1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6#include <dt-bindings/clock/ast2600-clock.h> 7 8/ { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 mdio0 = &mdio0; 40 mdio1 = &mdio1; 41 mdio2 = &mdio2; 42 mdio3 = &mdio3; 43 }; 44 45 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 enable-method = "aspeed,ast2600-smp"; 50 51 cpu@f00 { 52 compatible = "arm,cortex-a7"; 53 device_type = "cpu"; 54 reg = <0xf00>; 55 }; 56 57 cpu@f01 { 58 compatible = "arm,cortex-a7"; 59 device_type = "cpu"; 60 reg = <0xf01>; 61 }; 62 }; 63 64 timer { 65 compatible = "arm,armv7-timer"; 66 interrupt-parent = <&gic>; 67 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 68 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 69 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 70 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 71 arm,cpu-registers-not-fw-configured; 72 always-on; 73 }; 74 75 edac: sdram@1e6e0000 { 76 compatible = "aspeed,ast2600-sdram-edac"; 77 reg = <0x1e6e0000 0x174>; 78 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 79 }; 80 81 ahb { 82 compatible = "simple-bus"; 83 #address-cells = <1>; 84 #size-cells = <1>; 85 device_type = "soc"; 86 ranges; 87 88 gic: interrupt-controller@40461000 { 89 compatible = "arm,cortex-a7-gic"; 90 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 91 #interrupt-cells = <3>; 92 interrupt-controller; 93 interrupt-parent = <&gic>; 94 reg = <0x40461000 0x1000>, 95 <0x40462000 0x1000>, 96 <0x40464000 0x2000>, 97 <0x40466000 0x2000>; 98 }; 99 100 ahbc: bus@1e600000 { 101 compatible = "aspeed,ast2600-ahbc", "syscon"; 102 reg = <0x1e600000 0x100>; 103 }; 104 105 fmc: spi@1e620000 { 106 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 107 #address-cells = <1>; 108 #size-cells = <0>; 109 compatible = "aspeed,ast2600-fmc"; 110 clocks = <&syscon ASPEED_CLK_AHB>; 111 status = "disabled"; 112 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 113 flash@0 { 114 reg = < 0 >; 115 compatible = "jedec,spi-nor"; 116 spi-max-frequency = <50000000>; 117 spi-rx-bus-width = <2>; 118 status = "disabled"; 119 }; 120 flash@1 { 121 reg = < 1 >; 122 compatible = "jedec,spi-nor"; 123 spi-max-frequency = <50000000>; 124 spi-rx-bus-width = <2>; 125 status = "disabled"; 126 }; 127 flash@2 { 128 reg = < 2 >; 129 compatible = "jedec,spi-nor"; 130 spi-max-frequency = <50000000>; 131 spi-rx-bus-width = <2>; 132 status = "disabled"; 133 }; 134 }; 135 136 spi1: spi@1e630000 { 137 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; 138 #address-cells = <1>; 139 #size-cells = <0>; 140 compatible = "aspeed,ast2600-spi"; 141 clocks = <&syscon ASPEED_CLK_AHB>; 142 status = "disabled"; 143 flash@0 { 144 reg = < 0 >; 145 compatible = "jedec,spi-nor"; 146 spi-max-frequency = <50000000>; 147 spi-rx-bus-width = <2>; 148 status = "disabled"; 149 }; 150 flash@1 { 151 reg = < 1 >; 152 compatible = "jedec,spi-nor"; 153 spi-max-frequency = <50000000>; 154 spi-rx-bus-width = <2>; 155 status = "disabled"; 156 }; 157 }; 158 159 spi2: spi@1e631000 { 160 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; 161 #address-cells = <1>; 162 #size-cells = <0>; 163 compatible = "aspeed,ast2600-spi"; 164 clocks = <&syscon ASPEED_CLK_AHB>; 165 status = "disabled"; 166 flash@0 { 167 reg = < 0 >; 168 compatible = "jedec,spi-nor"; 169 spi-max-frequency = <50000000>; 170 spi-rx-bus-width = <2>; 171 status = "disabled"; 172 }; 173 flash@1 { 174 reg = < 1 >; 175 compatible = "jedec,spi-nor"; 176 spi-max-frequency = <50000000>; 177 spi-rx-bus-width = <2>; 178 status = "disabled"; 179 }; 180 flash@2 { 181 reg = < 2 >; 182 compatible = "jedec,spi-nor"; 183 spi-max-frequency = <50000000>; 184 spi-rx-bus-width = <2>; 185 status = "disabled"; 186 }; 187 }; 188 189 mdio0: mdio@1e650000 { 190 compatible = "aspeed,ast2600-mdio"; 191 reg = <0x1e650000 0x8>; 192 #address-cells = <1>; 193 #size-cells = <0>; 194 status = "disabled"; 195 pinctrl-names = "default"; 196 pinctrl-0 = <&pinctrl_mdio1_default>; 197 resets = <&syscon ASPEED_RESET_MII>; 198 }; 199 200 mdio1: mdio@1e650008 { 201 compatible = "aspeed,ast2600-mdio"; 202 reg = <0x1e650008 0x8>; 203 #address-cells = <1>; 204 #size-cells = <0>; 205 status = "disabled"; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_mdio2_default>; 208 resets = <&syscon ASPEED_RESET_MII>; 209 }; 210 211 mdio2: mdio@1e650010 { 212 compatible = "aspeed,ast2600-mdio"; 213 reg = <0x1e650010 0x8>; 214 #address-cells = <1>; 215 #size-cells = <0>; 216 status = "disabled"; 217 pinctrl-names = "default"; 218 pinctrl-0 = <&pinctrl_mdio3_default>; 219 resets = <&syscon ASPEED_RESET_MII>; 220 }; 221 222 mdio3: mdio@1e650018 { 223 compatible = "aspeed,ast2600-mdio"; 224 reg = <0x1e650018 0x8>; 225 #address-cells = <1>; 226 #size-cells = <0>; 227 status = "disabled"; 228 pinctrl-names = "default"; 229 pinctrl-0 = <&pinctrl_mdio4_default>; 230 resets = <&syscon ASPEED_RESET_MII>; 231 }; 232 233 mac0: ethernet@1e660000 { 234 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 235 reg = <0x1e660000 0x180>; 236 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 237 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 238 status = "disabled"; 239 }; 240 241 mac1: ethernet@1e680000 { 242 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 243 reg = <0x1e680000 0x180>; 244 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 245 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 246 status = "disabled"; 247 }; 248 249 mac2: ethernet@1e670000 { 250 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 251 reg = <0x1e670000 0x180>; 252 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 253 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 254 status = "disabled"; 255 }; 256 257 mac3: ethernet@1e690000 { 258 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 259 reg = <0x1e690000 0x180>; 260 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 261 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 262 status = "disabled"; 263 }; 264 265 ehci0: usb@1e6a1000 { 266 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 267 reg = <0x1e6a1000 0x100>; 268 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 269 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_usb2ah_default>; 272 status = "disabled"; 273 }; 274 275 ehci1: usb@1e6a3000 { 276 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 277 reg = <0x1e6a3000 0x100>; 278 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 279 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 280 pinctrl-names = "default"; 281 pinctrl-0 = <&pinctrl_usb2bh_default>; 282 status = "disabled"; 283 }; 284 285 uhci: usb@1e6b0000 { 286 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 287 reg = <0x1e6b0000 0x100>; 288 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 289 #ports = <2>; 290 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 291 status = "disabled"; 292 /* 293 * No default pinmux, it will follow EHCI, use an 294 * explicit pinmux override if EHCI is not enabled. 295 */ 296 }; 297 298 vhub: usb-vhub@1e6a0000 { 299 compatible = "aspeed,ast2600-usb-vhub"; 300 reg = <0x1e6a0000 0x350>; 301 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 303 aspeed,vhub-downstream-ports = <7>; 304 aspeed,vhub-generic-endpoints = <21>; 305 pinctrl-names = "default"; 306 pinctrl-0 = <&pinctrl_usb2ad_default>; 307 status = "disabled"; 308 }; 309 310 udc: usb@1e6a2000 { 311 compatible = "aspeed,ast2600-udc"; 312 reg = <0x1e6a2000 0x300>; 313 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 314 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 315 pinctrl-names = "default"; 316 pinctrl-0 = <&pinctrl_usb2bd_default>; 317 status = "disabled"; 318 }; 319 320 apb { 321 compatible = "simple-bus"; 322 #address-cells = <1>; 323 #size-cells = <1>; 324 ranges; 325 326 hace: crypto@1e6d0000 { 327 compatible = "aspeed,ast2600-hace"; 328 reg = <0x1e6d0000 0x200>; 329 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 330 clocks = <&syscon ASPEED_CLK_GATE_YCLK>; 331 resets = <&syscon ASPEED_RESET_HACE>; 332 }; 333 334 syscon: syscon@1e6e2000 { 335 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 336 reg = <0x1e6e2000 0x1000>; 337 ranges = <0 0x1e6e2000 0x1000>; 338 #address-cells = <1>; 339 #size-cells = <1>; 340 #clock-cells = <1>; 341 #reset-cells = <1>; 342 343 pinctrl: pinctrl { 344 compatible = "aspeed,ast2600-pinctrl"; 345 }; 346 347 silicon-id@14 { 348 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 349 reg = <0x14 0x4 0x5b0 0x8>; 350 }; 351 352 smp-memram@180 { 353 compatible = "aspeed,ast2600-smpmem"; 354 reg = <0x180 0x40>; 355 }; 356 357 scu_ic0: interrupt-controller@560 { 358 #interrupt-cells = <1>; 359 compatible = "aspeed,ast2600-scu-ic0"; 360 reg = <0x560 0x4>; 361 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 362 interrupt-controller; 363 }; 364 365 scu_ic1: interrupt-controller@570 { 366 #interrupt-cells = <1>; 367 compatible = "aspeed,ast2600-scu-ic1"; 368 reg = <0x570 0x4>; 369 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 370 interrupt-controller; 371 }; 372 }; 373 374 rng: hwrng@1e6e2524 { 375 compatible = "timeriomem_rng"; 376 reg = <0x1e6e2524 0x4>; 377 period = <1>; 378 quality = <100>; 379 }; 380 381 gfx: display@1e6e6000 { 382 compatible = "aspeed,ast2600-gfx", "syscon"; 383 reg = <0x1e6e6000 0x1000>; 384 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 385 resets = <&syscon ASPEED_RESET_GRAPHICS>; 386 syscon = <&syscon>; 387 status = "disabled"; 388 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 389 }; 390 391 adc0: adc@1e6e9000 { 392 compatible = "aspeed,ast2600-adc0"; 393 reg = <0x1e6e9000 0x100>; 394 clocks = <&syscon ASPEED_CLK_APB2>; 395 resets = <&syscon ASPEED_RESET_ADC>; 396 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 397 #io-channel-cells = <1>; 398 status = "disabled"; 399 }; 400 401 adc1: adc@1e6e9100 { 402 compatible = "aspeed,ast2600-adc1"; 403 reg = <0x1e6e9100 0x100>; 404 clocks = <&syscon ASPEED_CLK_APB2>; 405 resets = <&syscon ASPEED_RESET_ADC>; 406 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 407 #io-channel-cells = <1>; 408 status = "disabled"; 409 }; 410 411 sbc: secure-boot-controller@1e6f2000 { 412 compatible = "aspeed,ast2600-sbc"; 413 reg = <0x1e6f2000 0x1000>; 414 }; 415 416 acry: crypto@1e6fa000 { 417 compatible = "aspeed,ast2600-acry"; 418 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; 419 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 420 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; 421 aspeed,ahbc = <&ahbc>; 422 }; 423 424 video: video@1e700000 { 425 compatible = "aspeed,ast2600-video-engine"; 426 reg = <0x1e700000 0x1000>; 427 clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 428 <&syscon ASPEED_CLK_GATE_ECLK>; 429 clock-names = "vclk", "eclk"; 430 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 431 status = "disabled"; 432 }; 433 434 gpio0: gpio@1e780000 { 435 #gpio-cells = <2>; 436 gpio-controller; 437 compatible = "aspeed,ast2600-gpio"; 438 reg = <0x1e780000 0x400>; 439 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 440 gpio-ranges = <&pinctrl 0 0 208>; 441 ngpios = <208>; 442 clocks = <&syscon ASPEED_CLK_APB2>; 443 interrupt-controller; 444 #interrupt-cells = <2>; 445 }; 446 447 sgpiom0: sgpiom@1e780500 { 448 #gpio-cells = <2>; 449 gpio-controller; 450 compatible = "aspeed,ast2600-sgpiom"; 451 reg = <0x1e780500 0x100>; 452 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&syscon ASPEED_CLK_APB2>; 454 #interrupt-cells = <2>; 455 interrupt-controller; 456 bus-frequency = <12000000>; 457 pinctrl-names = "default"; 458 pinctrl-0 = <&pinctrl_sgpm1_default>; 459 status = "disabled"; 460 }; 461 462 sgpiom1: sgpiom@1e780600 { 463 #gpio-cells = <2>; 464 gpio-controller; 465 compatible = "aspeed,ast2600-sgpiom"; 466 reg = <0x1e780600 0x100>; 467 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 468 clocks = <&syscon ASPEED_CLK_APB2>; 469 #interrupt-cells = <2>; 470 interrupt-controller; 471 bus-frequency = <12000000>; 472 pinctrl-names = "default"; 473 pinctrl-0 = <&pinctrl_sgpm2_default>; 474 status = "disabled"; 475 }; 476 477 gpio1: gpio@1e780800 { 478 #gpio-cells = <2>; 479 gpio-controller; 480 compatible = "aspeed,ast2600-gpio"; 481 reg = <0x1e780800 0x800>; 482 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 483 gpio-ranges = <&pinctrl 0 208 36>; 484 ngpios = <36>; 485 clocks = <&syscon ASPEED_CLK_APB1>; 486 interrupt-controller; 487 #interrupt-cells = <2>; 488 }; 489 490 rtc: rtc@1e781000 { 491 compatible = "aspeed,ast2600-rtc"; 492 reg = <0x1e781000 0x18>; 493 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 494 status = "disabled"; 495 }; 496 497 timer: timer@1e782000 { 498 compatible = "aspeed,ast2600-timer"; 499 reg = <0x1e782000 0x90>; 500 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 501 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 502 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 503 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 504 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 505 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 506 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 507 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&syscon ASPEED_CLK_APB1>; 509 clock-names = "PCLK"; 510 status = "disabled"; 511 }; 512 513 uart1: serial@1e783000 { 514 compatible = "ns16550a"; 515 reg = <0x1e783000 0x20>; 516 reg-shift = <2>; 517 reg-io-width = <4>; 518 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 519 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 520 resets = <&lpc_reset 4>; 521 no-loopback-test; 522 pinctrl-names = "default"; 523 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 524 status = "disabled"; 525 }; 526 527 uart5: serial@1e784000 { 528 compatible = "ns16550a"; 529 reg = <0x1e784000 0x1000>; 530 reg-shift = <2>; 531 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 532 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 533 no-loopback-test; 534 }; 535 536 wdt1: watchdog@1e785000 { 537 compatible = "aspeed,ast2600-wdt"; 538 reg = <0x1e785000 0x40>; 539 }; 540 541 wdt2: watchdog@1e785040 { 542 compatible = "aspeed,ast2600-wdt"; 543 reg = <0x1e785040 0x40>; 544 status = "disabled"; 545 }; 546 547 wdt3: watchdog@1e785080 { 548 compatible = "aspeed,ast2600-wdt"; 549 reg = <0x1e785080 0x40>; 550 status = "disabled"; 551 }; 552 553 wdt4: watchdog@1e7850c0 { 554 compatible = "aspeed,ast2600-wdt"; 555 reg = <0x1e7850C0 0x40>; 556 status = "disabled"; 557 }; 558 559 peci0: peci-controller@1e78b000 { 560 compatible = "aspeed,ast2600-peci"; 561 reg = <0x1e78b000 0x100>; 562 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; 564 resets = <&syscon ASPEED_RESET_PECI>; 565 cmd-timeout-ms = <1000>; 566 clock-frequency = <1000000>; 567 status = "disabled"; 568 }; 569 570 lpc: lpc@1e789000 { 571 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 572 reg = <0x1e789000 0x1000>; 573 574 #address-cells = <1>; 575 #size-cells = <1>; 576 ranges = <0x0 0x1e789000 0x1000>; 577 578 kcs1: kcs@24 { 579 compatible = "aspeed,ast2500-kcs-bmc-v2"; 580 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 581 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 582 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 583 kcs_chan = <1>; 584 status = "disabled"; 585 }; 586 587 kcs2: kcs@28 { 588 compatible = "aspeed,ast2500-kcs-bmc-v2"; 589 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 590 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 591 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 592 status = "disabled"; 593 }; 594 595 kcs3: kcs@2c { 596 compatible = "aspeed,ast2500-kcs-bmc-v2"; 597 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 598 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 600 status = "disabled"; 601 }; 602 603 kcs4: kcs@114 { 604 compatible = "aspeed,ast2500-kcs-bmc-v2"; 605 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 606 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 607 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 608 status = "disabled"; 609 }; 610 611 lpc_ctrl: lpc-ctrl@80 { 612 compatible = "aspeed,ast2600-lpc-ctrl"; 613 reg = <0x80 0x80>; 614 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 615 status = "disabled"; 616 }; 617 618 lpc_snoop: lpc-snoop@80 { 619 compatible = "aspeed,ast2600-lpc-snoop"; 620 reg = <0x80 0x80>; 621 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 622 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 623 status = "disabled"; 624 }; 625 626 lhc: lhc@a0 { 627 compatible = "aspeed,ast2600-lhc"; 628 reg = <0xa0 0x24 0xc8 0x8>; 629 }; 630 631 lpc_reset: reset-controller@98 { 632 compatible = "aspeed,ast2600-lpc-reset"; 633 reg = <0x98 0x4>; 634 #reset-cells = <1>; 635 }; 636 637 uart_routing: uart-routing@98 { 638 compatible = "aspeed,ast2600-uart-routing"; 639 reg = <0x98 0x8>; 640 status = "disabled"; 641 }; 642 643 ibt: ibt@140 { 644 compatible = "aspeed,ast2600-ibt-bmc"; 645 reg = <0x140 0x18>; 646 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 647 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 648 status = "disabled"; 649 }; 650 }; 651 652 sdc: sdc@1e740000 { 653 compatible = "aspeed,ast2600-sd-controller"; 654 reg = <0x1e740000 0x100>; 655 #address-cells = <1>; 656 #size-cells = <1>; 657 ranges = <0 0x1e740000 0x10000>; 658 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 659 status = "disabled"; 660 661 sdhci0: sdhci@1e740100 { 662 compatible = "aspeed,ast2600-sdhci"; 663 reg = <0x100 0x100>; 664 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 665 sdhci,auto-cmd12; 666 clocks = <&syscon ASPEED_CLK_SDIO>; 667 status = "disabled"; 668 }; 669 670 sdhci1: sdhci@1e740200 { 671 compatible = "aspeed,ast2600-sdhci"; 672 reg = <0x200 0x100>; 673 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 674 sdhci,auto-cmd12; 675 clocks = <&syscon ASPEED_CLK_SDIO>; 676 status = "disabled"; 677 }; 678 }; 679 680 emmc_controller: sdc@1e750000 { 681 compatible = "aspeed,ast2600-sd-controller"; 682 reg = <0x1e750000 0x100>; 683 #address-cells = <1>; 684 #size-cells = <1>; 685 ranges = <0 0x1e750000 0x10000>; 686 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 687 status = "disabled"; 688 689 emmc: sdhci@1e750100 { 690 compatible = "aspeed,ast2600-sdhci"; 691 reg = <0x100 0x100>; 692 sdhci,auto-cmd12; 693 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 694 clocks = <&syscon ASPEED_CLK_EMMC>; 695 pinctrl-names = "default"; 696 pinctrl-0 = <&pinctrl_emmc_default>; 697 }; 698 }; 699 700 vuart1: serial@1e787000 { 701 compatible = "aspeed,ast2500-vuart"; 702 reg = <0x1e787000 0x40>; 703 reg-shift = <2>; 704 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 705 clocks = <&syscon ASPEED_CLK_APB1>; 706 no-loopback-test; 707 status = "disabled"; 708 }; 709 710 vuart3: serial@1e787800 { 711 compatible = "aspeed,ast2500-vuart"; 712 reg = <0x1e787800 0x40>; 713 reg-shift = <2>; 714 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 715 clocks = <&syscon ASPEED_CLK_APB2>; 716 no-loopback-test; 717 status = "disabled"; 718 }; 719 720 vuart2: serial@1e788000 { 721 compatible = "aspeed,ast2500-vuart"; 722 reg = <0x1e788000 0x40>; 723 reg-shift = <2>; 724 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 725 clocks = <&syscon ASPEED_CLK_APB1>; 726 no-loopback-test; 727 status = "disabled"; 728 }; 729 730 vuart4: serial@1e788800 { 731 compatible = "aspeed,ast2500-vuart"; 732 reg = <0x1e788800 0x40>; 733 reg-shift = <2>; 734 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 735 clocks = <&syscon ASPEED_CLK_APB2>; 736 no-loopback-test; 737 status = "disabled"; 738 }; 739 740 uart2: serial@1e78d000 { 741 compatible = "ns16550a"; 742 reg = <0x1e78d000 0x20>; 743 reg-shift = <2>; 744 reg-io-width = <4>; 745 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 746 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 747 resets = <&lpc_reset 5>; 748 no-loopback-test; 749 pinctrl-names = "default"; 750 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 751 status = "disabled"; 752 }; 753 754 uart3: serial@1e78e000 { 755 compatible = "ns16550a"; 756 reg = <0x1e78e000 0x20>; 757 reg-shift = <2>; 758 reg-io-width = <4>; 759 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 760 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 761 resets = <&lpc_reset 6>; 762 no-loopback-test; 763 pinctrl-names = "default"; 764 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 765 status = "disabled"; 766 }; 767 768 uart4: serial@1e78f000 { 769 compatible = "ns16550a"; 770 reg = <0x1e78f000 0x20>; 771 reg-shift = <2>; 772 reg-io-width = <4>; 773 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 774 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 775 resets = <&lpc_reset 7>; 776 no-loopback-test; 777 pinctrl-names = "default"; 778 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 779 status = "disabled"; 780 }; 781 782 uart6: serial@1e790000 { 783 compatible = "ns16550a"; 784 reg = <0x1e790000 0x20>; 785 reg-shift = <2>; 786 reg-io-width = <4>; 787 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 788 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>; 789 no-loopback-test; 790 pinctrl-names = "default"; 791 pinctrl-0 = <&pinctrl_uart6_default>; 792 793 status = "disabled"; 794 }; 795 796 uart7: serial@1e790100 { 797 compatible = "ns16550a"; 798 reg = <0x1e790100 0x20>; 799 reg-shift = <2>; 800 reg-io-width = <4>; 801 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 802 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>; 803 no-loopback-test; 804 pinctrl-names = "default"; 805 pinctrl-0 = <&pinctrl_uart7_default>; 806 807 status = "disabled"; 808 }; 809 810 uart8: serial@1e790200 { 811 compatible = "ns16550a"; 812 reg = <0x1e790200 0x20>; 813 reg-shift = <2>; 814 reg-io-width = <4>; 815 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 816 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>; 817 no-loopback-test; 818 pinctrl-names = "default"; 819 pinctrl-0 = <&pinctrl_uart8_default>; 820 821 status = "disabled"; 822 }; 823 824 uart9: serial@1e790300 { 825 compatible = "ns16550a"; 826 reg = <0x1e790300 0x20>; 827 reg-shift = <2>; 828 reg-io-width = <4>; 829 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 830 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>; 831 no-loopback-test; 832 pinctrl-names = "default"; 833 pinctrl-0 = <&pinctrl_uart9_default>; 834 835 status = "disabled"; 836 }; 837 838 i2c: bus@1e78a000 { 839 compatible = "simple-bus"; 840 #address-cells = <1>; 841 #size-cells = <1>; 842 ranges = <0 0x1e78a000 0x1000>; 843 }; 844 845 fsim0: fsi@1e79b000 { 846 #interrupt-cells = <1>; 847 compatible = "aspeed,ast2600-fsi-master"; 848 reg = <0x1e79b000 0x94>; 849 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 850 pinctrl-names = "default"; 851 pinctrl-0 = <&pinctrl_fsi1_default>; 852 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 853 interrupt-controller; 854 status = "disabled"; 855 }; 856 857 fsim1: fsi@1e79b100 { 858 #interrupt-cells = <1>; 859 compatible = "aspeed,ast2600-fsi-master"; 860 reg = <0x1e79b100 0x94>; 861 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 862 pinctrl-names = "default"; 863 pinctrl-0 = <&pinctrl_fsi2_default>; 864 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 865 interrupt-controller; 866 status = "disabled"; 867 }; 868 }; 869 }; 870}; 871 872#include "aspeed-g6-pinctrl.dtsi" 873 874&i2c { 875 i2c0: i2c@80 { 876 #address-cells = <1>; 877 #size-cells = <0>; 878 reg = <0x80 0x80>; 879 compatible = "aspeed,ast2600-i2c-bus"; 880 clocks = <&syscon ASPEED_CLK_APB2>; 881 resets = <&syscon ASPEED_RESET_I2C>; 882 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 883 bus-frequency = <100000>; 884 pinctrl-names = "default"; 885 pinctrl-0 = <&pinctrl_i2c1_default>; 886 status = "disabled"; 887 }; 888 889 i2c1: i2c@100 { 890 #address-cells = <1>; 891 #size-cells = <0>; 892 reg = <0x100 0x80>; 893 compatible = "aspeed,ast2600-i2c-bus"; 894 clocks = <&syscon ASPEED_CLK_APB2>; 895 resets = <&syscon ASPEED_RESET_I2C>; 896 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 897 bus-frequency = <100000>; 898 pinctrl-names = "default"; 899 pinctrl-0 = <&pinctrl_i2c2_default>; 900 status = "disabled"; 901 }; 902 903 i2c2: i2c@180 { 904 #address-cells = <1>; 905 #size-cells = <0>; 906 reg = <0x180 0x80>; 907 compatible = "aspeed,ast2600-i2c-bus"; 908 clocks = <&syscon ASPEED_CLK_APB2>; 909 resets = <&syscon ASPEED_RESET_I2C>; 910 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 911 bus-frequency = <100000>; 912 pinctrl-names = "default"; 913 pinctrl-0 = <&pinctrl_i2c3_default>; 914 status = "disabled"; 915 }; 916 917 i2c3: i2c@200 { 918 #address-cells = <1>; 919 #size-cells = <0>; 920 reg = <0x200 0x80>; 921 compatible = "aspeed,ast2600-i2c-bus"; 922 clocks = <&syscon ASPEED_CLK_APB2>; 923 resets = <&syscon ASPEED_RESET_I2C>; 924 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 925 bus-frequency = <100000>; 926 pinctrl-names = "default"; 927 pinctrl-0 = <&pinctrl_i2c4_default>; 928 status = "disabled"; 929 }; 930 931 i2c4: i2c@280 { 932 #address-cells = <1>; 933 #size-cells = <0>; 934 reg = <0x280 0x80>; 935 compatible = "aspeed,ast2600-i2c-bus"; 936 clocks = <&syscon ASPEED_CLK_APB2>; 937 resets = <&syscon ASPEED_RESET_I2C>; 938 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 939 bus-frequency = <100000>; 940 pinctrl-names = "default"; 941 pinctrl-0 = <&pinctrl_i2c5_default>; 942 status = "disabled"; 943 }; 944 945 i2c5: i2c@300 { 946 #address-cells = <1>; 947 #size-cells = <0>; 948 reg = <0x300 0x80>; 949 compatible = "aspeed,ast2600-i2c-bus"; 950 clocks = <&syscon ASPEED_CLK_APB2>; 951 resets = <&syscon ASPEED_RESET_I2C>; 952 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 953 bus-frequency = <100000>; 954 pinctrl-names = "default"; 955 pinctrl-0 = <&pinctrl_i2c6_default>; 956 status = "disabled"; 957 }; 958 959 i2c6: i2c@380 { 960 #address-cells = <1>; 961 #size-cells = <0>; 962 reg = <0x380 0x80>; 963 compatible = "aspeed,ast2600-i2c-bus"; 964 clocks = <&syscon ASPEED_CLK_APB2>; 965 resets = <&syscon ASPEED_RESET_I2C>; 966 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 967 bus-frequency = <100000>; 968 pinctrl-names = "default"; 969 pinctrl-0 = <&pinctrl_i2c7_default>; 970 status = "disabled"; 971 }; 972 973 i2c7: i2c@400 { 974 #address-cells = <1>; 975 #size-cells = <0>; 976 reg = <0x400 0x80>; 977 compatible = "aspeed,ast2600-i2c-bus"; 978 clocks = <&syscon ASPEED_CLK_APB2>; 979 resets = <&syscon ASPEED_RESET_I2C>; 980 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 981 bus-frequency = <100000>; 982 pinctrl-names = "default"; 983 pinctrl-0 = <&pinctrl_i2c8_default>; 984 status = "disabled"; 985 }; 986 987 i2c8: i2c@480 { 988 #address-cells = <1>; 989 #size-cells = <0>; 990 reg = <0x480 0x80>; 991 compatible = "aspeed,ast2600-i2c-bus"; 992 clocks = <&syscon ASPEED_CLK_APB2>; 993 resets = <&syscon ASPEED_RESET_I2C>; 994 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 995 bus-frequency = <100000>; 996 pinctrl-names = "default"; 997 pinctrl-0 = <&pinctrl_i2c9_default>; 998 status = "disabled"; 999 }; 1000 1001 i2c9: i2c@500 { 1002 #address-cells = <1>; 1003 #size-cells = <0>; 1004 reg = <0x500 0x80>; 1005 compatible = "aspeed,ast2600-i2c-bus"; 1006 clocks = <&syscon ASPEED_CLK_APB2>; 1007 resets = <&syscon ASPEED_RESET_I2C>; 1008 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1009 bus-frequency = <100000>; 1010 pinctrl-names = "default"; 1011 pinctrl-0 = <&pinctrl_i2c10_default>; 1012 status = "disabled"; 1013 }; 1014 1015 i2c10: i2c@580 { 1016 #address-cells = <1>; 1017 #size-cells = <0>; 1018 reg = <0x580 0x80>; 1019 compatible = "aspeed,ast2600-i2c-bus"; 1020 clocks = <&syscon ASPEED_CLK_APB2>; 1021 resets = <&syscon ASPEED_RESET_I2C>; 1022 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1023 bus-frequency = <100000>; 1024 pinctrl-names = "default"; 1025 pinctrl-0 = <&pinctrl_i2c11_default>; 1026 status = "disabled"; 1027 }; 1028 1029 i2c11: i2c@600 { 1030 #address-cells = <1>; 1031 #size-cells = <0>; 1032 reg = <0x600 0x80>; 1033 compatible = "aspeed,ast2600-i2c-bus"; 1034 clocks = <&syscon ASPEED_CLK_APB2>; 1035 resets = <&syscon ASPEED_RESET_I2C>; 1036 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1037 bus-frequency = <100000>; 1038 pinctrl-names = "default"; 1039 pinctrl-0 = <&pinctrl_i2c12_default>; 1040 status = "disabled"; 1041 }; 1042 1043 i2c12: i2c@680 { 1044 #address-cells = <1>; 1045 #size-cells = <0>; 1046 reg = <0x680 0x80>; 1047 compatible = "aspeed,ast2600-i2c-bus"; 1048 clocks = <&syscon ASPEED_CLK_APB2>; 1049 resets = <&syscon ASPEED_RESET_I2C>; 1050 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 1051 bus-frequency = <100000>; 1052 pinctrl-names = "default"; 1053 pinctrl-0 = <&pinctrl_i2c13_default>; 1054 status = "disabled"; 1055 }; 1056 1057 i2c13: i2c@700 { 1058 #address-cells = <1>; 1059 #size-cells = <0>; 1060 reg = <0x700 0x80>; 1061 compatible = "aspeed,ast2600-i2c-bus"; 1062 clocks = <&syscon ASPEED_CLK_APB2>; 1063 resets = <&syscon ASPEED_RESET_I2C>; 1064 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1065 bus-frequency = <100000>; 1066 pinctrl-names = "default"; 1067 pinctrl-0 = <&pinctrl_i2c14_default>; 1068 status = "disabled"; 1069 }; 1070 1071 i2c14: i2c@780 { 1072 #address-cells = <1>; 1073 #size-cells = <0>; 1074 reg = <0x780 0x80>; 1075 compatible = "aspeed,ast2600-i2c-bus"; 1076 clocks = <&syscon ASPEED_CLK_APB2>; 1077 resets = <&syscon ASPEED_RESET_I2C>; 1078 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 1079 bus-frequency = <100000>; 1080 pinctrl-names = "default"; 1081 pinctrl-0 = <&pinctrl_i2c15_default>; 1082 status = "disabled"; 1083 }; 1084 1085 i2c15: i2c@800 { 1086 #address-cells = <1>; 1087 #size-cells = <0>; 1088 reg = <0x800 0x80>; 1089 compatible = "aspeed,ast2600-i2c-bus"; 1090 clocks = <&syscon ASPEED_CLK_APB2>; 1091 resets = <&syscon ASPEED_RESET_I2C>; 1092 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1093 bus-frequency = <100000>; 1094 pinctrl-names = "default"; 1095 pinctrl-0 = <&pinctrl_i2c16_default>; 1096 status = "disabled"; 1097 }; 1098}; 1099