1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Slow Path Operators (header) 37 * 38 */ 39 40 #ifndef __BNXT_QPLIB_SP_H__ 41 #define __BNXT_QPLIB_SP_H__ 42 43 #include <rdma/bnxt_re-abi.h> 44 #define BNXT_QPLIB_RESERVED_QP_WRS 128 45 46 struct bnxt_qplib_dev_attr { 47 #define FW_VER_ARR_LEN 4 48 u8 fw_ver[FW_VER_ARR_LEN]; 49 #define BNXT_QPLIB_NUM_GIDS_SUPPORTED 256 50 u16 max_sgid; 51 u16 max_mrw; 52 u32 max_qp; 53 #define BNXT_QPLIB_MAX_OUT_RD_ATOM 126 54 u32 max_qp_rd_atom; 55 u32 max_qp_init_rd_atom; 56 u32 max_qp_wqes; 57 u32 max_qp_sges; 58 u32 max_cq; 59 #define BNXT_QPLIB_MAX_CQ_WQES 0xfffff 60 u32 max_cq_wqes; 61 u32 max_cq_sges; 62 u32 max_mr; 63 u64 max_mr_size; 64 u32 max_pd; 65 u32 max_mw; 66 u32 max_raw_ethy_qp; 67 u32 max_ah; 68 u32 max_srq; 69 u32 max_srq_wqes; 70 u32 max_srq_sges; 71 u32 max_pkey; 72 u32 max_inline_data; 73 u32 l2_db_size; 74 u8 tqm_alloc_reqs[MAX_TQM_ALLOC_REQ]; 75 bool is_atomic; 76 u16 dev_cap_flags; 77 u16 dev_cap_flags2; 78 u32 max_dpi; 79 }; 80 81 struct bnxt_qplib_pd { 82 u32 id; 83 }; 84 85 struct bnxt_qplib_gid { 86 u8 data[16]; 87 }; 88 89 struct bnxt_qplib_gid_info { 90 struct bnxt_qplib_gid gid; 91 u16 vlan_id; 92 }; 93 94 struct bnxt_qplib_ah { 95 struct bnxt_qplib_gid dgid; 96 struct bnxt_qplib_pd *pd; 97 u32 id; 98 u8 sgid_index; 99 /* For Query AH if the hw table and SW table are differnt */ 100 u8 host_sgid_index; 101 u8 traffic_class; 102 u32 flow_label; 103 u8 hop_limit; 104 u8 sl; 105 u8 dmac[6]; 106 u16 vlan_id; 107 u8 nw_type; 108 }; 109 110 struct bnxt_qplib_mrw { 111 struct bnxt_qplib_pd *pd; 112 int type; 113 u32 access_flags; 114 #define BNXT_QPLIB_MR_ACCESS_MASK 0xFF 115 #define BNXT_QPLIB_FR_PMR 0x80000000 116 u32 lkey; 117 u32 rkey; 118 #define BNXT_QPLIB_RSVD_LKEY 0xFFFFFFFF 119 u64 va; 120 u64 total_size; 121 u32 npages; 122 u16 flags; 123 u64 mr_handle; 124 struct bnxt_qplib_hwq hwq; 125 }; 126 127 struct bnxt_qplib_frpl { 128 int max_pg_ptrs; 129 struct bnxt_qplib_hwq hwq; 130 }; 131 132 #define BNXT_QPLIB_ACCESS_LOCAL_WRITE BIT(0) 133 #define BNXT_QPLIB_ACCESS_REMOTE_READ BIT(1) 134 #define BNXT_QPLIB_ACCESS_REMOTE_WRITE BIT(2) 135 #define BNXT_QPLIB_ACCESS_REMOTE_ATOMIC BIT(3) 136 #define BNXT_QPLIB_ACCESS_MW_BIND BIT(4) 137 #define BNXT_QPLIB_ACCESS_ZERO_BASED BIT(5) 138 #define BNXT_QPLIB_ACCESS_ON_DEMAND BIT(6) 139 140 struct bnxt_qplib_roce_stats { 141 u64 to_retransmits; 142 u64 seq_err_naks_rcvd; 143 /* seq_err_naks_rcvd is 64 b */ 144 u64 max_retry_exceeded; 145 /* max_retry_exceeded is 64 b */ 146 u64 rnr_naks_rcvd; 147 /* rnr_naks_rcvd is 64 b */ 148 u64 missing_resp; 149 u64 unrecoverable_err; 150 /* unrecoverable_err is 64 b */ 151 u64 bad_resp_err; 152 /* bad_resp_err is 64 b */ 153 u64 local_qp_op_err; 154 /* local_qp_op_err is 64 b */ 155 u64 local_protection_err; 156 /* local_protection_err is 64 b */ 157 u64 mem_mgmt_op_err; 158 /* mem_mgmt_op_err is 64 b */ 159 u64 remote_invalid_req_err; 160 /* remote_invalid_req_err is 64 b */ 161 u64 remote_access_err; 162 /* remote_access_err is 64 b */ 163 u64 remote_op_err; 164 /* remote_op_err is 64 b */ 165 u64 dup_req; 166 /* dup_req is 64 b */ 167 u64 res_exceed_max; 168 /* res_exceed_max is 64 b */ 169 u64 res_length_mismatch; 170 /* res_length_mismatch is 64 b */ 171 u64 res_exceeds_wqe; 172 /* res_exceeds_wqe is 64 b */ 173 u64 res_opcode_err; 174 /* res_opcode_err is 64 b */ 175 u64 res_rx_invalid_rkey; 176 /* res_rx_invalid_rkey is 64 b */ 177 u64 res_rx_domain_err; 178 /* res_rx_domain_err is 64 b */ 179 u64 res_rx_no_perm; 180 /* res_rx_no_perm is 64 b */ 181 u64 res_rx_range_err; 182 /* res_rx_range_err is 64 b */ 183 u64 res_tx_invalid_rkey; 184 /* res_tx_invalid_rkey is 64 b */ 185 u64 res_tx_domain_err; 186 /* res_tx_domain_err is 64 b */ 187 u64 res_tx_no_perm; 188 /* res_tx_no_perm is 64 b */ 189 u64 res_tx_range_err; 190 /* res_tx_range_err is 64 b */ 191 u64 res_irrq_oflow; 192 /* res_irrq_oflow is 64 b */ 193 u64 res_unsup_opcode; 194 /* res_unsup_opcode is 64 b */ 195 u64 res_unaligned_atomic; 196 /* res_unaligned_atomic is 64 b */ 197 u64 res_rem_inv_err; 198 /* res_rem_inv_err is 64 b */ 199 u64 res_mem_error; 200 /* res_mem_error is 64 b */ 201 u64 res_srq_err; 202 /* res_srq_err is 64 b */ 203 u64 res_cmp_err; 204 /* res_cmp_err is 64 b */ 205 u64 res_invalid_dup_rkey; 206 /* res_invalid_dup_rkey is 64 b */ 207 u64 res_wqe_format_err; 208 /* res_wqe_format_err is 64 b */ 209 u64 res_cq_load_err; 210 /* res_cq_load_err is 64 b */ 211 u64 res_srq_load_err; 212 /* res_srq_load_err is 64 b */ 213 u64 res_tx_pci_err; 214 /* res_tx_pci_err is 64 b */ 215 u64 res_rx_pci_err; 216 /* res_rx_pci_err is 64 b */ 217 u64 res_oos_drop_count; 218 /* res_oos_drop_count */ 219 u64 active_qp_count_p0; 220 /* port 0 active qps */ 221 u64 active_qp_count_p1; 222 /* port 1 active qps */ 223 u64 active_qp_count_p2; 224 /* port 2 active qps */ 225 u64 active_qp_count_p3; 226 /* port 3 active qps */ 227 }; 228 229 struct bnxt_qplib_ext_stat { 230 u64 tx_atomic_req; 231 u64 tx_read_req; 232 u64 tx_read_res; 233 u64 tx_write_req; 234 u64 tx_send_req; 235 u64 tx_roce_pkts; 236 u64 tx_roce_bytes; 237 u64 rx_atomic_req; 238 u64 rx_read_req; 239 u64 rx_read_res; 240 u64 rx_write_req; 241 u64 rx_send_req; 242 u64 rx_roce_pkts; 243 u64 rx_roce_bytes; 244 u64 rx_roce_good_pkts; 245 u64 rx_roce_good_bytes; 246 u64 rx_out_of_buffer; 247 u64 rx_out_of_sequence; 248 u64 tx_cnp; 249 u64 rx_cnp; 250 u64 rx_ecn_marked; 251 }; 252 253 struct bnxt_qplib_cc_param_ext { 254 u64 ext_mask; 255 u16 inact_th_hi; 256 u16 min_delta_cnp; 257 u16 init_cp; 258 u8 tr_update_mode; 259 u8 tr_update_cyls; 260 u8 fr_rtt; 261 u8 ai_rate_incr; 262 u16 rr_rtt_th; 263 u16 ar_cr_th; 264 u16 cr_min_th; 265 u8 bw_avg_weight; 266 u8 cr_factor; 267 u16 cr_th_max_cp; 268 u8 cp_bias_en; 269 u8 cp_bias; 270 u8 cnp_ecn; 271 u8 rtt_jitter_en; 272 u16 bytes_per_usec; 273 u16 cc_cr_reset_th; 274 u8 cr_width; 275 u8 min_quota; 276 u8 max_quota; 277 u8 abs_max_quota; 278 u16 tr_lb; 279 u8 cr_prob_fac; 280 u8 tr_prob_fac; 281 u16 fair_cr_th; 282 u8 red_div; 283 u8 cnp_ratio_th; 284 u16 ai_ext_rtt; 285 u8 exp_crcp_ratio; 286 u8 low_rate_en; 287 u16 cpcr_update_th; 288 u16 ai_rtt_th1; 289 u16 ai_rtt_th2; 290 u16 cf_rtt_th; 291 u16 sc_cr_th1; /* severe congestion cr threshold 1 */ 292 u16 sc_cr_th2; /* severe congestion cr threshold 2 */ 293 u32 l64B_per_rtt; 294 u8 cc_ack_bytes; 295 u16 reduce_cf_rtt_th; 296 }; 297 298 struct bnxt_qplib_cc_param { 299 u8 alt_vlan_pcp; 300 u8 qp1_tos_dscp; 301 u16 alt_tos_dscp; 302 u8 cc_mode; 303 u8 enable; 304 u16 inact_th; 305 u16 init_cr; 306 u16 init_tr; 307 u16 rtt; 308 u8 g; 309 u8 nph_per_state; 310 u8 time_pph; 311 u8 pkts_pph; 312 u8 tos_ecn; 313 u8 tos_dscp; 314 u16 tcp_cp; 315 struct bnxt_qplib_cc_param_ext cc_ext; 316 u32 mask; 317 }; 318 319 int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res, 320 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index, 321 struct bnxt_qplib_gid *gid); 322 int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 323 struct bnxt_qplib_gid *gid, u16 vlan_id, bool update); 324 int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 325 struct bnxt_qplib_gid *gid, const u8 *mac, u16 vlan_id, 326 bool update, u32 *index); 327 int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 328 struct bnxt_qplib_gid *gid, u16 gid_idx, 329 const u8 *smac); 330 int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw); 331 int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res, 332 struct bnxt_qplib_rcfw *rcfw, 333 struct bnxt_qplib_ctx *ctx); 334 int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah, 335 bool block); 336 int bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah, 337 bool block); 338 int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, 339 struct bnxt_qplib_mrw *mrw); 340 int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw, 341 bool block); 342 int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr, 343 struct ib_umem *umem, int num_pbls, u32 buf_pg_size); 344 int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr); 345 int bnxt_qplib_alloc_fast_reg_mr(struct bnxt_qplib_res *res, 346 struct bnxt_qplib_mrw *mr, int max); 347 int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res, 348 struct bnxt_qplib_frpl *frpl, int max); 349 int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res, 350 struct bnxt_qplib_frpl *frpl); 351 int bnxt_qplib_get_roce_stats(struct bnxt_qplib_rcfw *rcfw, 352 struct bnxt_qplib_roce_stats *stats); 353 int bnxt_qplib_qext_stat(struct bnxt_qplib_rcfw *rcfw, u32 fid, 354 struct bnxt_qplib_ext_stat *estat); 355 int bnxt_qplib_modify_cc(struct bnxt_qplib_res *res, 356 struct bnxt_qplib_cc_param *cc_param); 357 int bnxt_qplib_read_context(struct bnxt_qplib_rcfw *rcfw, u8 type, u32 xid, 358 u32 resp_size, void *resp_va); 359 int bnxt_qplib_query_cc_param(struct bnxt_qplib_res *res, 360 struct bnxt_qplib_cc_param *cc_param); 361 362 #define BNXT_VAR_MAX_WQE 4352 363 #define BNXT_VAR_MAX_SLOT_ALIGN 256 364 #define BNXT_VAR_MAX_SGE 13 365 #define BNXT_RE_MAX_RQ_WQES 65536 366 367 #define BNXT_STATIC_MAX_SGE 6 368 369 #endif /* __BNXT_QPLIB_SP_H__*/ 370