| /linux/drivers/gpio/ |
| H A D | gpio-madera.c | 28 unsigned int reg_offset = 2 * offset; in madera_gpio_get_direction() local
47 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_in() local
58 unsigned int reg_offset = 2 * offset; in madera_gpio_get() local
75 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_out() local
95 unsigned int reg_offset = 2 * offset; in madera_gpio_set() local
|
| H A D | gpio-rtd.c | 73 u8 deb_index, u8 *reg_offset, u8 *shift) in rtd_gpio_get_deb_setval()
81 u8 deb_index, u8 *reg_offset, u8 *shift) in rtd1295_misc_gpio_get_deb_setval()
89 u8 deb_index, u8 *reg_offset, u8 *shift) in rtd1295_iso_gpio_get_deb_setval()
220 u8 deb_val, deb_index, reg_offset, shift; in rtd_gpio_set_debounce() local
320 int reg_offset; in rtd_gpio_get_direction() local
335 int reg_offset; in rtd_gpio_set_direction() local
384 int reg_offset, i, j; in rtd_gpio_irq_handle() local
|
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v4_4.c | 167 uint32_t reg_offset, in sdma_v4_4_get_ras_error_count()
202 uint32_t reg_offset = 0; in sdma_v4_4_query_ras_error_count_by_instance() local
239 uint32_t reg_offset; in sdma_v4_4_reset_ras_error_count() local
|
| H A D | mmsch_v1_0.h | 61 uint32_t reg_offset : 28; member
66 uint32_t reg_offset : 20; member
99 uint32_t reg_offset, in mmsch_v1_0_insert_direct_wt()
109 uint32_t reg_offset, in mmsch_v1_0_insert_direct_rd_mod_wt()
121 uint32_t reg_offset, in mmsch_v1_0_insert_direct_poll()
|
| H A D | jpeg_v1_0.c | 42 …_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t v… in jpeg_v1_0_decode_ring_patch_wreg()
61 uint32_t reg, reg_offset, val, mask, i; in jpeg_v1_0_decode_ring_set_patch_ring() local
358 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_reg_wait() local
402 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_wreg() local
|
| H A D | soc24.c | 138 u32 reg_offset) in soc24_read_indexed_register()
156 u32 sh_num, u32 reg_offset) in soc24_get_register_value()
169 u32 sh_num, u32 reg_offset, u32 *value) in soc24_read_register()
|
| H A D | jpeg_v5_0_1.c | 398 int reg_offset = ring->pipe ? jpeg_v5_0_1_core_reg_offset(ring->pipe) : 0; in jpeg_v5_0_1_init_jrbc() local
657 int reg_offset = (j ? jpeg_v5_0_1_core_reg_offset(j) : 0); in jpeg_v5_0_1_is_idle() local
677 int reg_offset = (j ? jpeg_v5_0_1_core_reg_offset(j) : 0); in jpeg_v5_0_1_wait_for_idle() local
814 int reg_offset = ring->pipe ? jpeg_v5_0_1_core_reg_offset(ring->pipe) : 0; in jpeg_v5_0_1_core_stall_reset() local
|
| H A D | nv.c | 358 u32 sh_num, u32 reg_offset) in nv_read_indexed_register()
376 u32 sh_num, u32 reg_offset) in nv_get_register_value()
388 u32 sh_num, u32 reg_offset, u32 *value) in nv_read_register()
|
| H A D | soc21.c | 273 u32 sh_num, u32 reg_offset) in soc21_read_indexed_register()
291 u32 sh_num, u32 reg_offset) in soc21_get_register_value()
303 u32 sh_num, u32 reg_offset, u32 *value) in soc21_read_register()
|
| H A D | mmsch_v3_0.h | 56 uint32_t reg_offset : 28; member
61 uint32_t reg_offset : 20; member
|
| /linux/drivers/comedi/drivers/ |
| H A D | comedi_8254.c | 131 unsigned int reg_offset = (reg * I8254_IO8) << i8254->regshift; in i8254_io8_cb() local
145 unsigned int reg_offset = (reg * I8254_IO16) << i8254->regshift; in i8254_io16_cb() local
159 unsigned int reg_offset = (reg * I8254_IO32) << i8254->regshift; in i8254_io32_cb() local
175 unsigned int reg_offset = (reg * I8254_IO8) << i8254->regshift; in i8254_mmio8_cb() local
189 unsigned int reg_offset = (reg * I8254_IO16) << i8254->regshift; in i8254_mmio16_cb() local
203 unsigned int reg_offset = (reg * I8254_IO32) << i8254->regshift; in i8254_mmio32_cb() local
|
| /linux/drivers/net/wireless/ath/ath9k/ |
| H A D | htc_drv_init.c | 234 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) in ath9k_regread()
302 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_single()
323 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_buffer()
346 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite()
384 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_buffer()
467 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_single()
489 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw()
|
| H A D | ar9003_hw.c | 1102 unsigned int dbg_reg, reg_offset; in ath9k_hw_verify_hang() local
1136 unsigned int reg_offset; in ar9003_hw_detect_mac_hang() local
|
| /linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-socfpga.c | 50 u32 reg_offset; member
108 u32 reg_offset, reg_shift; in socfpga_dwmac_parse_data() local
275 u32 reg_offset = dwmac->reg_offset; in socfpga_gen5_set_phy_mode() local
333 u32 reg_offset = dwmac->reg_offset; in socfpga_gen10_set_phy_mode() local
|
| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | common_baco.h | 38 uint32_t reg_offset; member
50 uint32_t reg_offset; member
|
| /linux/drivers/irqchip/ |
| H A D | irq-gic-v5-irs.c | 28 const u32 reg_offset) in irs_readl_relaxed()
34 const u32 val, const u32 reg_offset) in irs_writel_relaxed()
40 const u32 reg_offset) in irs_readq_relaxed()
46 const u64 val, const u32 reg_offset) in irs_writeq_relaxed()
|
| H A D | irq-gic-v5-iwb.c | 22 static u32 iwb_readl_relaxed(struct gicv5_iwb_chip_data *iwb_node, const u32 reg_offset) in iwb_readl_relaxed()
28 const u32 reg_offset) in iwb_writel_relaxed()
|
| /linux/drivers/gpu/drm/radeon/ |
| H A D | cik_sdma.c | 251 u32 rb_cntl, reg_offset; in cik_sdma_gfx_stop() local
305 uint32_t reg_offset, value; in cik_sdma_ctx_switch_enable() local
332 u32 me_cntl, reg_offset; in cik_sdma_enable() local
369 u32 reg_offset, wb_offset; in cik_sdma_gfx_resume() local
|
| /linux/drivers/net/mdio/ |
| H A D | mdio-ipq8064.c | 53 ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset) in ipq8064_mdio_read()
75 ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data) in ipq8064_mdio_write()
|
| /linux/drivers/reset/ |
| H A D | reset-simple.c | 117 u32 reg_offset; member
168 u32 reg_offset = 0; in reset_simple_probe() local
|
| /linux/arch/powerpc/include/asm/ |
| H A D | tsi108.h | 103 static inline u32 tsi108_read_reg(u32 reg_offset) in tsi108_read_reg()
108 static inline void tsi108_write_reg(u32 reg_offset, u32 val) in tsi108_write_reg()
|
| /linux/drivers/media/platform/nxp/imx-jpeg/ |
| H A D | mxc-jpeg-hw.c | 12 #define print_wrapper_reg(dev, base_address, reg_offset)\ argument
15 #define internal_print_wrapper_reg(dev, base_address, reg_name, reg_offset) {\ argument
|
| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_packet_manager_v9.c | 304 uint32_t sch_value, uint32_t que_sleep, uint32_t *reg_offset, in pm_build_dequeue_wait_counts_packet_info()
329 uint32_t reg_offset = 0; in pm_config_dequeue_wait_counts_v9() local
|
| /linux/drivers/clocksource/ |
| H A D | timer-atmel-pit.c | 59 static inline unsigned int pit_read(void __iomem *base, unsigned int reg_offset) in pit_read()
64 static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsigned long value) in pit_write()
|
| /linux/drivers/pinctrl/freescale/ |
| H A D | pinctrl-imx1-core.c | 89 u32 value, u32 reg_offset) in imx1_write_2bit()
116 u32 value, u32 reg_offset) in imx1_write_bit()
136 u32 reg_offset) in imx1_read_2bit()
149 u32 reg_offset) in imx1_read_bit()
|