1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Support for Intel Camera Imaging ISP subsystem.
4 * Copyright (c) 2015, Intel Corporation.
5 */
6
7 #include "ia_css_mipi.h"
8 #include "sh_css_mipi.h"
9 #include <type_support.h>
10 #include "system_global.h"
11 #include "ia_css_err.h"
12 #include "ia_css_pipe.h"
13 #include "ia_css_stream_format.h"
14 #include "sh_css_stream_format.h"
15 #include "ia_css_stream_public.h"
16 #include "ia_css_frame_public.h"
17 #include "ia_css_input_port.h"
18 #include "ia_css_debug.h"
19 #include "sh_css_struct.h"
20 #include "sh_css_defs.h"
21 #include "sh_css_sp.h" /* sh_css_update_host2sp_mipi_frame sh_css_update_host2sp_num_mipi_frames ... */
22 #include "sw_event_global.h" /* IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY */
23
24 static u32
25 ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */
26
27 /* Assumptions:
28 * - A line is multiple of 4 bytes = 1 word.
29 * - Each frame has SOF and EOF (each 1 word).
30 * - Each line has format header and optionally SOL and EOL (each 1 word).
31 * - Odd and even lines of YUV420 format are different in bites per pixel size.
32 * - Custom size of embedded data.
33 * -- Interleaved frames are not taken into account.
34 * -- Lines are multiples of 8B, and not necessary of (custom 3B, or 7B
35 * etc.).
36 * Result is given in DDR mem words, 32B or 256 bits
37 */
38 int
ia_css_mipi_frame_calculate_size(const unsigned int width,const unsigned int height,const enum atomisp_input_format format,const bool hasSOLandEOL,const unsigned int embedded_data_size_words,unsigned int * size_mem_words)39 ia_css_mipi_frame_calculate_size(const unsigned int width,
40 const unsigned int height,
41 const enum atomisp_input_format format,
42 const bool hasSOLandEOL,
43 const unsigned int embedded_data_size_words,
44 unsigned int *size_mem_words)
45 {
46 int err = 0;
47
48 unsigned int bits_per_pixel = 0;
49 unsigned int even_line_bytes = 0;
50 unsigned int odd_line_bytes = 0;
51 unsigned int words_per_odd_line = 0;
52 unsigned int words_for_first_line = 0;
53 unsigned int words_per_even_line = 0;
54 unsigned int mem_words_per_even_line = 0;
55 unsigned int mem_words_per_odd_line = 0;
56 unsigned int mem_words_for_first_line = 0;
57 unsigned int mem_words_for_EOF = 0;
58 unsigned int mem_words = 0;
59 unsigned int width_padded = width;
60
61 /* The changes will be reverted as soon as RAW
62 * Buffers are deployed by the 2401 Input System
63 * in the non-continuous use scenario.
64 */
65 if (IS_ISP2401)
66 width_padded += (2 * ISP_VEC_NELEMS);
67
68 IA_CSS_ENTER("padded_width=%d, height=%d, format=%d, hasSOLandEOL=%d, embedded_data_size_words=%d\n",
69 width_padded, height, format, hasSOLandEOL, embedded_data_size_words);
70
71 switch (format) {
72 case ATOMISP_INPUT_FORMAT_RAW_6: /* 4p, 3B, 24bits */
73 bits_per_pixel = 6;
74 break;
75 case ATOMISP_INPUT_FORMAT_RAW_7: /* 8p, 7B, 56bits */
76 bits_per_pixel = 7;
77 break;
78 case ATOMISP_INPUT_FORMAT_RAW_8: /* 1p, 1B, 8bits */
79 case ATOMISP_INPUT_FORMAT_BINARY_8: /* 8bits, TODO: check. */
80 case ATOMISP_INPUT_FORMAT_YUV420_8: /* odd 2p, 2B, 16bits, even 2p, 4B, 32bits */
81 bits_per_pixel = 8;
82 break;
83 case ATOMISP_INPUT_FORMAT_YUV420_10: /* odd 4p, 5B, 40bits, even 4p, 10B, 80bits */
84 case ATOMISP_INPUT_FORMAT_RAW_10: /* 4p, 5B, 40bits */
85 /* The changes will be reverted as soon as RAW
86 * Buffers are deployed by the 2401 Input System
87 * in the non-continuous use scenario.
88 */
89 bits_per_pixel = 10;
90 break;
91 case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: /* 2p, 3B, 24bits */
92 case ATOMISP_INPUT_FORMAT_RAW_12: /* 2p, 3B, 24bits */
93 bits_per_pixel = 12;
94 break;
95 case ATOMISP_INPUT_FORMAT_RAW_14: /* 4p, 7B, 56bits */
96 bits_per_pixel = 14;
97 break;
98 case ATOMISP_INPUT_FORMAT_RGB_444: /* 1p, 2B, 16bits */
99 case ATOMISP_INPUT_FORMAT_RGB_555: /* 1p, 2B, 16bits */
100 case ATOMISP_INPUT_FORMAT_RGB_565: /* 1p, 2B, 16bits */
101 case ATOMISP_INPUT_FORMAT_YUV422_8: /* 2p, 4B, 32bits */
102 bits_per_pixel = 16;
103 break;
104 case ATOMISP_INPUT_FORMAT_RGB_666: /* 4p, 9B, 72bits */
105 bits_per_pixel = 18;
106 break;
107 case ATOMISP_INPUT_FORMAT_YUV422_10: /* 2p, 5B, 40bits */
108 bits_per_pixel = 20;
109 break;
110 case ATOMISP_INPUT_FORMAT_RGB_888: /* 1p, 3B, 24bits */
111 bits_per_pixel = 24;
112 break;
113
114 case ATOMISP_INPUT_FORMAT_YUV420_16: /* Not supported */
115 case ATOMISP_INPUT_FORMAT_YUV422_16: /* Not supported */
116 case ATOMISP_INPUT_FORMAT_RAW_16: /* TODO: not specified in MIPI SPEC, check */
117 default:
118 return -EINVAL;
119 }
120
121 odd_line_bytes = (width_padded * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */
122
123 /* Even lines for YUV420 formats are double in bits_per_pixel. */
124 if (format == ATOMISP_INPUT_FORMAT_YUV420_8
125 || format == ATOMISP_INPUT_FORMAT_YUV420_10
126 || format == ATOMISP_INPUT_FORMAT_YUV420_16) {
127 even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >>
128 3; /* ceil ( bits per line / 8) */
129 } else {
130 even_line_bytes = odd_line_bytes;
131 }
132
133 /* a frame represented in memory: ()- optional; data - payload words.
134 * addr 0 1 2 3 4 5 6 7:
135 * first SOF (SOL) PACK_H data data data data data
136 * data data data data data data data data
137 * ...
138 * data data 0 0 0 0 0 0
139 * second (EOL) (SOL) PACK_H data data data data data
140 * data data data data data data data data
141 * ...
142 * data data 0 0 0 0 0 0
143 * ...
144 * last (EOL) EOF 0 0 0 0 0 0
145 *
146 * Embedded lines are regular lines stored before the first and after
147 * payload lines.
148 */
149
150 words_per_odd_line = (odd_line_bytes + 3) >> 2;
151 /* ceil(odd_line_bytes/4); word = 4 bytes */
152 words_per_even_line = (even_line_bytes + 3) >> 2;
153 words_for_first_line = words_per_odd_line + 2 + (hasSOLandEOL ? 1 : 0);
154 /* + SOF +packet header + optionally (SOL), but (EOL) is not in the first line */
155 words_per_odd_line += (1 + (hasSOLandEOL ? 2 : 0));
156 /* each non-first line has format header, and optionally (SOL) and (EOL). */
157 words_per_even_line += (1 + (hasSOLandEOL ? 2 : 0));
158
159 mem_words_per_odd_line = (words_per_odd_line + 7) >> 3;
160 /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */
161 mem_words_for_first_line = (words_for_first_line + 7) >> 3;
162 mem_words_per_even_line = (words_per_even_line + 7) >> 3;
163 mem_words_for_EOF = 1; /* last line consist of the optional (EOL) and EOF */
164
165 mem_words = ((embedded_data_size_words + 7) >> 3) +
166 mem_words_for_first_line +
167 (((height + 1) >> 1) - 1) * mem_words_per_odd_line +
168 /* ceil (height/2) - 1 (first line is calculated separately) */
169 (height >> 1) * mem_words_per_even_line + /* floor(height/2) */
170 mem_words_for_EOF;
171
172 *size_mem_words = mem_words; /* ceil(words/8); mem word is 32B = 8words. */
173 /* Check if the above is still needed. */
174
175 IA_CSS_LEAVE_ERR(err);
176 return err;
177 }
178
179 void
mipi_init(void)180 mipi_init(void)
181 {
182 unsigned int i;
183
184 for (i = 0; i < N_CSI_PORTS; i++)
185 ref_count_mipi_allocation[i] = 0;
186 }
187
188 /*
189 * @brief Calculate the required MIPI buffer sizes.
190 * Based on the stream configuration, calculate the
191 * required MIPI buffer sizes (in DDR words).
192 *
193 * @param[in] stream_cfg Point to the target stream configuration
194 * @param[out] size_mem_words MIPI buffer size in DDR words.
195 *
196 * @return
197 */
calculate_mipi_buff_size(struct ia_css_stream_config * stream_cfg,unsigned int * size_mem_words)198 static int calculate_mipi_buff_size(struct ia_css_stream_config *stream_cfg,
199 unsigned int *size_mem_words)
200 {
201 unsigned int width;
202 unsigned int height;
203 enum atomisp_input_format format;
204 bool pack_raw_pixels;
205
206 unsigned int width_padded;
207 unsigned int bits_per_pixel = 0;
208
209 unsigned int even_line_bytes = 0;
210 unsigned int odd_line_bytes = 0;
211
212 unsigned int words_per_odd_line = 0;
213 unsigned int words_per_even_line = 0;
214
215 unsigned int mem_words_per_even_line = 0;
216 unsigned int mem_words_per_odd_line = 0;
217
218 unsigned int mem_words_per_buff_line = 0;
219 unsigned int mem_words_per_buff = 0;
220 int err = 0;
221
222 /**
223 * zhengjie.lu@intel.com
224 *
225 * NOTE
226 * - In the struct "ia_css_stream_config", there
227 * are two members: "input_config" and "isys_config".
228 * Both of them provide the same information, e.g.
229 * input_res and format.
230 *
231 * Question here is that: which one shall be used?
232 */
233 width = stream_cfg->input_config.input_res.width;
234 height = stream_cfg->input_config.input_res.height;
235 format = stream_cfg->input_config.format;
236 pack_raw_pixels = stream_cfg->pack_raw_pixels;
237 /* end of NOTE */
238
239 /**
240 * zhengjie.lu@intel.com
241 *
242 * NOTE
243 * - The following code is derived from the
244 * existing code "ia_css_mipi_frame_calculate_size()".
245 *
246 * Question here is: why adding "2 * ISP_VEC_NELEMS"
247 * to "width_padded", but not making "width_padded"
248 * aligned with "2 * ISP_VEC_NELEMS"?
249 */
250 /* The changes will be reverted as soon as RAW
251 * Buffers are deployed by the 2401 Input System
252 * in the non-continuous use scenario.
253 */
254 width_padded = width + (2 * ISP_VEC_NELEMS);
255 /* end of NOTE */
256
257 IA_CSS_ENTER("padded_width=%d, height=%d, format=%d\n",
258 width_padded, height, format);
259
260 bits_per_pixel = sh_css_stream_format_2_bits_per_subpixel(format);
261 bits_per_pixel =
262 (format == ATOMISP_INPUT_FORMAT_RAW_10 && pack_raw_pixels) ? bits_per_pixel : 16;
263 if (bits_per_pixel == 0)
264 return -EINVAL;
265
266 odd_line_bytes = (width_padded * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */
267
268 /* Even lines for YUV420 formats are double in bits_per_pixel. */
269 if (format == ATOMISP_INPUT_FORMAT_YUV420_8
270 || format == ATOMISP_INPUT_FORMAT_YUV420_10) {
271 even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >>
272 3; /* ceil ( bits per line / 8) */
273 } else {
274 even_line_bytes = odd_line_bytes;
275 }
276
277 words_per_odd_line = (odd_line_bytes + 3) >> 2;
278 /* ceil(odd_line_bytes/4); word = 4 bytes */
279 words_per_even_line = (even_line_bytes + 3) >> 2;
280
281 mem_words_per_odd_line = (words_per_odd_line + 7) >> 3;
282 /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */
283 mem_words_per_even_line = (words_per_even_line + 7) >> 3;
284
285 mem_words_per_buff_line =
286 (mem_words_per_odd_line > mem_words_per_even_line) ? mem_words_per_odd_line : mem_words_per_even_line;
287 mem_words_per_buff = mem_words_per_buff_line * height;
288
289 *size_mem_words = mem_words_per_buff;
290
291 IA_CSS_LEAVE_ERR(err);
292 return err;
293 }
294
295 int
allocate_mipi_frames(struct ia_css_pipe * pipe,struct ia_css_stream_info * info)296 allocate_mipi_frames(struct ia_css_pipe *pipe,
297 struct ia_css_stream_info *info)
298 {
299 int err = -EINVAL;
300 unsigned int port;
301
302 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
303 "allocate_mipi_frames(%p) enter:\n", pipe);
304
305 if (IS_ISP2401 && pipe->stream->config.online) {
306 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
307 "allocate_mipi_frames(%p) exit: no buffers needed for 2401 pipe mode.\n",
308 pipe);
309 return 0;
310 }
311
312 if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) {
313 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
314 "allocate_mipi_frames(%p) exit: no buffers needed for pipe mode.\n",
315 pipe);
316 return 0; /* AM TODO: Check */
317 }
318
319 port = (unsigned int)pipe->stream->config.source.port.port;
320 if (port >= N_CSI_PORTS) {
321 IA_CSS_ERROR("allocate_mipi_frames(%p) exit: port is not correct (port=%d).",
322 pipe, port);
323 return -EINVAL;
324 }
325
326 if (IS_ISP2401)
327 err = calculate_mipi_buff_size(&pipe->stream->config,
328 &my_css.mipi_frame_size[port]);
329
330 /*
331 * 2401 system allows multiple streams to use same physical port. This is not
332 * true for 2400 system. Currently 2401 uses MIPI buffers as a temporary solution.
333 * TODO AM: Once that is changed (removed) this code should be removed as well.
334 * In that case only 2400 related code should remain.
335 */
336 if (ref_count_mipi_allocation[port] != 0) {
337 if (IS_ISP2401)
338 ref_count_mipi_allocation[port]++;
339
340 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
341 "allocate_mipi_frames(%p) leave: nothing to do, already allocated for this port (port=%d).\n",
342 pipe, port);
343 return 0;
344 }
345
346 ref_count_mipi_allocation[port]++;
347
348 /* AM TODO: mipi frames number should come from stream struct. */
349 my_css.num_mipi_frames[port] = NUM_MIPI_FRAMES_PER_STREAM;
350
351 /* Incremental allocation (per stream), not for all streams at once. */
352 { /* limit the scope of i,j */
353 unsigned int i, j;
354
355 for (i = 0; i < my_css.num_mipi_frames[port]; i++) {
356 /* free previous frame */
357 if (my_css.mipi_frames[port][i]) {
358 ia_css_frame_free(my_css.mipi_frames[port][i]);
359 my_css.mipi_frames[port][i] = NULL;
360 }
361 /* check if new frame is needed */
362 if (i < my_css.num_mipi_frames[port]) {
363 /* allocate new frame */
364 err = ia_css_frame_allocate_with_buffer_size(
365 &my_css.mipi_frames[port][i],
366 my_css.mipi_frame_size[port] * HIVE_ISP_DDR_WORD_BYTES);
367 if (err) {
368 for (j = 0; j < i; j++) {
369 if (my_css.mipi_frames[port][j]) {
370 ia_css_frame_free(my_css.mipi_frames[port][j]);
371 my_css.mipi_frames[port][j] = NULL;
372 }
373 }
374 IA_CSS_ERROR("allocate_mipi_frames(%p, %d) exit: allocation failed.",
375 pipe, port);
376 return err;
377 }
378 }
379 if (info->metadata_info.size > 0) {
380 /* free previous metadata buffer */
381 if (my_css.mipi_metadata[port][i]) {
382 ia_css_metadata_free(my_css.mipi_metadata[port][i]);
383 my_css.mipi_metadata[port][i] = NULL;
384 }
385 /* check if need to allocate a new metadata buffer */
386 if (i < my_css.num_mipi_frames[port]) {
387 /* allocate new metadata buffer */
388 my_css.mipi_metadata[port][i] = ia_css_metadata_allocate(&info->metadata_info);
389 if (!my_css.mipi_metadata[port][i]) {
390 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
391 "allocate_mipi_metadata(%p, %d) failed.\n",
392 pipe, port);
393 return err;
394 }
395 }
396 }
397 }
398 }
399 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
400 "allocate_mipi_frames(%p) exit:\n", pipe);
401
402 return err;
403 }
404
405 int
free_mipi_frames(struct ia_css_pipe * pipe)406 free_mipi_frames(struct ia_css_pipe *pipe)
407 {
408 int err = -EINVAL;
409 unsigned int port;
410
411 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
412 "free_mipi_frames(%p) enter:\n", pipe);
413
414 /* assert(pipe != NULL); TEMP: TODO: Should be assert only. */
415 if (pipe) {
416 assert(pipe->stream);
417 if ((!pipe) || (!pipe->stream)) {
418 IA_CSS_ERROR("free_mipi_frames(%p) exit: pipe or stream is null.",
419 pipe);
420 return -EINVAL;
421 }
422
423 if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) {
424 IA_CSS_ERROR("free_mipi_frames(%p) exit: wrong mode.",
425 pipe);
426 return err;
427 }
428
429 port = (unsigned int)pipe->stream->config.source.port.port;
430
431 if (port >= N_CSI_PORTS) {
432 IA_CSS_ERROR("free_mipi_frames(%p, %d) exit: pipe port is not correct.",
433 pipe, port);
434 return err;
435 }
436
437 if (ref_count_mipi_allocation[port] > 0) {
438 if (!IS_ISP2401) {
439 assert(ref_count_mipi_allocation[port] == 1);
440 if (ref_count_mipi_allocation[port] != 1) {
441 IA_CSS_ERROR("free_mipi_frames(%p) exit: wrong ref_count (ref_count=%d).",
442 pipe, ref_count_mipi_allocation[port]);
443 return err;
444 }
445 }
446
447 ref_count_mipi_allocation[port]--;
448
449 if (ref_count_mipi_allocation[port] == 0) {
450 /* no streams are using this buffer, so free it */
451 unsigned int i;
452
453 for (i = 0; i < my_css.num_mipi_frames[port]; i++) {
454 if (my_css.mipi_frames[port][i]) {
455 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
456 "free_mipi_frames(port=%d, num=%d).\n", port, i);
457 ia_css_frame_free(my_css.mipi_frames[port][i]);
458 my_css.mipi_frames[port][i] = NULL;
459 }
460 if (my_css.mipi_metadata[port][i]) {
461 ia_css_metadata_free(my_css.mipi_metadata[port][i]);
462 my_css.mipi_metadata[port][i] = NULL;
463 }
464 }
465
466 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
467 "free_mipi_frames(%p) exit (deallocated).\n", pipe);
468 }
469 }
470 } else { /* pipe ==NULL */
471 /* AM TEMP: free-ing all mipi buffers just like a legacy code. */
472 for (port = 0; port < N_CSI_PORTS; port++) {
473 unsigned int i;
474
475 for (i = 0; i < my_css.num_mipi_frames[port]; i++) {
476 if (my_css.mipi_frames[port][i]) {
477 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
478 "free_mipi_frames(port=%d, num=%d).\n", port, i);
479 ia_css_frame_free(my_css.mipi_frames[port][i]);
480 my_css.mipi_frames[port][i] = NULL;
481 }
482 if (my_css.mipi_metadata[port][i]) {
483 ia_css_metadata_free(my_css.mipi_metadata[port][i]);
484 my_css.mipi_metadata[port][i] = NULL;
485 }
486 }
487 ref_count_mipi_allocation[port] = 0;
488 }
489 }
490 return 0;
491 }
492
493 int
send_mipi_frames(struct ia_css_pipe * pipe)494 send_mipi_frames(struct ia_css_pipe *pipe)
495 {
496 int err = -EINVAL;
497 unsigned int i;
498 unsigned int port;
499
500 IA_CSS_ENTER_PRIVATE("pipe=%p", pipe);
501
502 /* multi stream video needs mipi buffers */
503 /* nothing to be done in other cases. */
504 if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) {
505 IA_CSS_LOG("nothing to be done for this mode");
506 return 0;
507 /* TODO: AM: maybe this should be returning an error. */
508 }
509
510 port = (unsigned int)pipe->stream->config.source.port.port;
511
512 if (port >= N_CSI_PORTS) {
513 IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).",
514 pipe, port);
515 return err;
516 }
517
518 /* Hand-over the SP-internal mipi buffers */
519 for (i = 0; i < my_css.num_mipi_frames[port]; i++) {
520 /* Need to include the offset for port. */
521 sh_css_update_host2sp_mipi_frame(port * NUM_MIPI_FRAMES_PER_STREAM + i,
522 my_css.mipi_frames[port][i]);
523 sh_css_update_host2sp_mipi_metadata(port * NUM_MIPI_FRAMES_PER_STREAM + i,
524 my_css.mipi_metadata[port][i]);
525 }
526 sh_css_update_host2sp_num_mipi_frames(my_css.num_mipi_frames[port]);
527
528 /**********************************
529 * Send an event to inform the SP
530 * that all MIPI frames are passed.
531 **********************************/
532 if (!sh_css_sp_is_running()) {
533 /* SP is not running. The queues are not valid */
534 IA_CSS_ERROR("sp is not running");
535 return err;
536 }
537
538 ia_css_bufq_enqueue_psys_event(
539 IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY,
540 (uint8_t)port,
541 (uint8_t)my_css.num_mipi_frames[port],
542 0 /* not used */);
543 IA_CSS_LEAVE_ERR_PRIVATE(0);
544 return 0;
545 }
546