| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mmhub_v1_8.c | 59 u32 inst_mask; in mmhub_v1_8_setup_vm_pt_regs() local
82 u32 inst_mask; in mmhub_v1_8_init_gart_aperture_regs() local
132 uint32_t tmp, inst_mask; in mmhub_v1_8_init_system_aperture_regs() local
195 uint32_t tmp, inst_mask; in mmhub_v1_8_init_tlb_regs() local
239 uint32_t tmp, inst_mask; mmhub_v1_8_init_snoop_override_regs() local
267 uint32_t tmp, inst_mask; mmhub_v1_8_init_cache_regs() local
328 uint32_t tmp, inst_mask; mmhub_v1_8_enable_system_domain() local
348 u32 inst_mask; mmhub_v1_8_disable_identity_aperture() local
381 uint32_t tmp, inst_mask; mmhub_v1_8_setup_vmid_config() local
447 u32 i, j, inst_mask; mmhub_v1_8_program_invalidation() local
483 u32 i, inst_mask; mmhub_v1_8_disable_l1_tlb() local
508 u32 i, j, inst_mask; mmhub_v1_8_gart_disable() local
538 u32 tmp, inst_mask; mmhub_v1_8_set_fault_enable_default() local
584 u32 inst_mask; mmhub_v1_8_init() local
729 uint32_t inst_mask; mmhub_v1_8_query_ras_error_count() local
757 uint32_t inst_mask; mmhub_v1_8_reset_ras_error_count() local
[all...] |
| H A D | sdma_v4_4_2.c | 163 uint32_t inst_mask) in sdma_v4_4_2_inst_init_golden_registers() argument
492 uint32_t inst_mask) in sdma_v4_4_2_inst_gfx_stop() argument
535 uint32_t inst_mask) in sdma_v4_4_2_inst_rlc_stop() argument
549 uint32_t inst_mask) in sdma_v4_4_2_inst_page_stop() argument
576 sdma_v4_4_2_inst_ctx_switch_enable(struct amdgpu_device * adev,bool enable,uint32_t inst_mask) sdma_v4_4_2_inst_ctx_switch_enable() argument
631 sdma_v4_4_2_inst_enable(struct amdgpu_device * adev,bool enable,uint32_t inst_mask) sdma_v4_4_2_inst_enable() argument
904 sdma_v4_4_2_inst_rlc_resume(struct amdgpu_device * adev,uint32_t inst_mask) sdma_v4_4_2_inst_rlc_resume() argument
921 sdma_v4_4_2_inst_load_microcode(struct amdgpu_device * adev,uint32_t inst_mask) sdma_v4_4_2_inst_load_microcode() argument
967 sdma_v4_4_2_inst_start(struct amdgpu_device * adev,uint32_t inst_mask,bool restore) sdma_v4_4_2_inst_start() argument
1557 uint32_t inst_mask; sdma_v4_4_2_hw_init() local
1571 uint32_t inst_mask; sdma_v4_4_2_hw_fini() local
1677 u32 inst_mask; sdma_v4_4_2_stop_queue() local
1714 u32 inst_mask; sdma_v4_4_2_restore_queue() local
1942 sdma_v4_4_2_inst_update_medium_grain_light_sleep(struct amdgpu_device * adev,bool enable,uint32_t inst_mask) sdma_v4_4_2_inst_update_medium_grain_light_sleep() argument
1971 sdma_v4_4_2_inst_update_medium_grain_clock_gating(struct amdgpu_device * adev,bool enable,uint32_t inst_mask) sdma_v4_4_2_inst_update_medium_grain_clock_gating() argument
2011 uint32_t inst_mask; sdma_v4_4_2_set_clockgating_state() local
2385 sdma_v4_4_2_xcp_resume(void * handle,uint32_t inst_mask) sdma_v4_4_2_xcp_resume() argument
2398 sdma_v4_4_2_xcp_suspend(void * handle,uint32_t inst_mask) sdma_v4_4_2_xcp_suspend() argument
2482 uint32_t inst_mask; sdma_v4_4_2_query_ras_error_count() local
2507 uint32_t inst_mask; sdma_v4_4_2_reset_ras_error_count() local
[all...] |
| H A D | amdgpu_ip.c | 69 uint32_t inst_mask) in amdgpu_populate_ip_map() argument
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| H A D | amdgpu_jpeg.h | 137 uint16_t inst_mask; member
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| H A D | amdgpu_xcp.c | 361 uint32_t *inst_mask) in amdgpu_xcp_get_inst_details() argument
507 uint32_t inst_mask; in amdgpu_set_xcp_id() local
[all...] |
| H A D | amdgpu_xcp.h | 94 uint32_t inst_mask; member
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| H A D | sdma_v5_0.c | 563 static void sdma_v5_0_gfx_stop(struct amdgpu_device *adev, uint32_t inst_mask) in sdma_v5_0_gfx_stop() argument
660 uint32_t inst_mask; in sdma_v5_0_enable() local
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| H A D | sdma_v5_2.c | 413 static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev, uint32_t inst_mask) in sdma_v5_2_gfx_stop() argument
509 uint32_t inst_mask; in sdma_v5_2_enable() local
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| H A D | amdgpu_kms.c | 623 u32 count, inst_mask; in amdgpu_info_ioctl() local
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| H A D | aqua_vanjaram.c | 537 u32 mask, avail_inst, inst_mask = adev->sdma.sdma_mask; in aqua_vanjaram_init_soc_config() local
[all...] |
| H A D | gmc_v9_0.c | 1851 unsigned long inst_mask = adev->aid_mask; in gmc_v9_0_sw_init() local
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| H A D | amdgpu_vcn.h | 351 uint16_t inst_mask; member
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| H A D | gfx_v9_4_3.c | 4972 static int gfx_v9_4_3_xcp_resume(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_resume() argument
5004 static int gfx_v9_4_3_xcp_suspend(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_suspend() argument
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| H A D | amdgpu_ras.c | 362 uint32_t mask, inst_mask = data->inject.instance_mask; in amdgpu_ras_instance_mask_check() local
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| H A D | amdgpu.h | 1541 #define for_each_inst(i, inst_mask) \ argument
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_12_ppt.c | 369 u32 inst_mask; in smu_v13_0_12_get_xcp_metrics() local
428 u32 inst_mask; in smu_v13_0_12_get_gpu_metrics() local
[all...] |
| H A D | smu_v13_0_6_ppt.c | 2569 u32 inst_mask; in smu_v13_0_6_get_xcp_metrics() local
2692 u32 inst_mask; in smu_v13_0_6_get_gpu_metrics() local
3138 smu_v13_0_6_reset_sdma(struct smu_context * smu,uint32_t inst_mask) smu_v13_0_6_reset_sdma() argument
3155 smu_v13_0_6_reset_vcn(struct smu_context * smu,uint32_t inst_mask) smu_v13_0_6_reset_vcn() argument
[all...] |
| /linux/drivers/gpu/drm/amd/pm/swsmu/ |
| H A D | amdgpu_smu.c | 4069 int smu_reset_sdma(struct smu_context *smu, uint32_t inst_mask) in smu_reset_sdma() argument
4079 int smu_reset_vcn(struct smu_context *smu, uint32_t inst_mask) in smu_reset_vcn() argument
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