xref: /linux/drivers/gpio/gpio-kempld.c (revision 1334d2a3b3235d062e5e1f51aebe7a64ed57cf72)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Kontron PLD GPIO driver
4  *
5  * Copyright (c) 2010-2013 Kontron Europe GmbH
6  * Author: Michael Brunner <michael.brunner@kontron.com>
7  */
8 
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/bitops.h>
13 #include <linux/errno.h>
14 #include <linux/interrupt.h>
15 #include <linux/platform_device.h>
16 #include <linux/gpio/driver.h>
17 #include <linux/mfd/kempld.h>
18 
19 #define KEMPLD_GPIO_MAX_NUM		16
20 #define KEMPLD_GPIO_MASK(x)		(BIT((x) % 8))
21 #define KEMPLD_GPIO_DIR			0x40
22 #define KEMPLD_GPIO_LVL			0x42
23 #define KEMPLD_GPIO_STS			0x44
24 #define KEMPLD_GPIO_EVT_LVL_EDGE	0x46
25 #define KEMPLD_GPIO_EVT_LOW_HIGH	0x48
26 #define KEMPLD_GPIO_IEN			0x4A
27 #define KEMPLD_GPIO_OUT_LVL		0x4E
28 
29 /* The IRQ to use if none was configured in the BIOS */
30 static unsigned int gpio_irq;
31 module_param_hw(gpio_irq, uint, irq, 0444);
32 MODULE_PARM_DESC(gpio_irq, "Set legacy GPIO IRQ (1-15)");
33 
34 struct kempld_gpio_data {
35 	struct gpio_chip		chip;
36 	struct kempld_device_data	*pld;
37 	u8				out_lvl_reg;
38 
39 	struct mutex			irq_lock;
40 	u16				ien;
41 	u16				evt_low_high;
42 	u16				evt_lvl_edge;
43 };
44 
45 /*
46  * Set or clear GPIO bit
47  * kempld_get_mutex must be called prior to calling this function.
48  */
kempld_gpio_bitop(struct kempld_device_data * pld,u8 reg,unsigned int bit,bool val)49 static void kempld_gpio_bitop(struct kempld_device_data *pld,
50 			      u8 reg, unsigned int bit, bool val)
51 {
52 	u8 status;
53 
54 	status = kempld_read8(pld, reg + (bit / 8));
55 	if (val)
56 		status |= KEMPLD_GPIO_MASK(bit);
57 	else
58 		status &= ~KEMPLD_GPIO_MASK(bit);
59 	kempld_write8(pld, reg + (bit / 8), status);
60 }
61 
kempld_gpio_get_bit(struct kempld_device_data * pld,u8 reg,unsigned int bit)62 static int kempld_gpio_get_bit(struct kempld_device_data *pld,
63 			       u8 reg, unsigned int bit)
64 {
65 	u8 status;
66 
67 	kempld_get_mutex(pld);
68 	status = kempld_read8(pld, reg + (bit / 8));
69 	kempld_release_mutex(pld);
70 
71 	return !!(status & KEMPLD_GPIO_MASK(bit));
72 }
73 
kempld_gpio_get(struct gpio_chip * chip,unsigned offset)74 static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset)
75 {
76 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
77 	struct kempld_device_data *pld = gpio->pld;
78 
79 	return !!kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL, offset);
80 }
81 
kempld_gpio_get_multiple(struct gpio_chip * chip,unsigned long * mask,unsigned long * bits)82 static int kempld_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
83 				    unsigned long *bits)
84 {
85 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
86 	struct kempld_device_data *pld = gpio->pld;
87 	u8 reg = KEMPLD_GPIO_LVL;
88 	unsigned int shift;
89 
90 	bits[0] &= ~mask[0];
91 
92 	kempld_get_mutex(pld);
93 
94 	/* Try to reduce to a single 8 bits access if possible */
95 	for (shift = 0; shift < gpio->chip.ngpio; shift += 8, reg++) {
96 		unsigned long msk = (mask[0] >> shift) & 0xff;
97 
98 		if (!msk)
99 			continue;
100 
101 		bits[0] |= (kempld_read8(pld, reg) & msk) << shift;
102 	}
103 
104 	kempld_release_mutex(pld);
105 
106 	return 0;
107 }
108 
kempld_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)109 static int kempld_gpio_set(struct gpio_chip *chip, unsigned int offset,
110 			   int value)
111 {
112 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
113 	struct kempld_device_data *pld = gpio->pld;
114 
115 	kempld_get_mutex(pld);
116 	kempld_gpio_bitop(pld, gpio->out_lvl_reg, offset, value);
117 	kempld_release_mutex(pld);
118 
119 	return 0;
120 }
121 
kempld_gpio_set_multiple(struct gpio_chip * chip,unsigned long * mask,unsigned long * bits)122 static int kempld_gpio_set_multiple(struct gpio_chip *chip,
123 				    unsigned long *mask, unsigned long *bits)
124 {
125 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
126 	struct kempld_device_data *pld = gpio->pld;
127 	u8 reg = gpio->out_lvl_reg;
128 	unsigned int shift;
129 
130 	kempld_get_mutex(pld);
131 
132 	/* Try to reduce to a single 8 bits access if possible */
133 	for (shift = 0; shift < gpio->chip.ngpio; shift += 8, reg++) {
134 		u8 val, msk = mask[0] >> shift;
135 
136 		if (!msk)
137 			continue;
138 
139 		if (msk != 0xFF)
140 			val = kempld_read8(pld, reg) & ~msk;
141 		else
142 			val = 0;
143 
144 		val |= (bits[0] >> shift) & msk;
145 		kempld_write8(pld, reg, val);
146 	}
147 
148 	kempld_release_mutex(pld);
149 
150 	return 0;
151 }
152 
kempld_gpio_direction_input(struct gpio_chip * chip,unsigned offset)153 static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
154 {
155 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
156 	struct kempld_device_data *pld = gpio->pld;
157 
158 	kempld_get_mutex(pld);
159 	kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR, offset, 0);
160 	kempld_release_mutex(pld);
161 
162 	return 0;
163 }
164 
kempld_gpio_direction_output(struct gpio_chip * chip,unsigned offset,int value)165 static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
166 					int value)
167 {
168 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
169 	struct kempld_device_data *pld = gpio->pld;
170 
171 	kempld_get_mutex(pld);
172 	kempld_gpio_bitop(pld, gpio->out_lvl_reg, offset, value);
173 	kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR, offset, 1);
174 	kempld_release_mutex(pld);
175 
176 	return 0;
177 }
178 
kempld_gpio_get_direction(struct gpio_chip * chip,unsigned offset)179 static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
180 {
181 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
182 	struct kempld_device_data *pld = gpio->pld;
183 
184 	if (kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR, offset))
185 		return GPIO_LINE_DIRECTION_OUT;
186 
187 	return GPIO_LINE_DIRECTION_IN;
188 }
189 
kempld_gpio_pincount(struct kempld_device_data * pld)190 static int kempld_gpio_pincount(struct kempld_device_data *pld)
191 {
192 	u16 evt, evt_back;
193 
194 	kempld_get_mutex(pld);
195 
196 	/* Backup event register as it might be already initialized */
197 	evt_back = kempld_read16(pld, KEMPLD_GPIO_EVT_LVL_EDGE);
198 	/* Clear event register */
199 	kempld_write16(pld, KEMPLD_GPIO_EVT_LVL_EDGE, 0x0000);
200 	/* Read back event register */
201 	evt = kempld_read16(pld, KEMPLD_GPIO_EVT_LVL_EDGE);
202 	/* Restore event register */
203 	kempld_write16(pld, KEMPLD_GPIO_EVT_LVL_EDGE, evt_back);
204 
205 	kempld_release_mutex(pld);
206 
207 	return evt ? __ffs(evt) : 16;
208 }
209 
kempld_irq_mask(struct irq_data * data)210 static void kempld_irq_mask(struct irq_data *data)
211 {
212 	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
213 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
214 
215 	gpio->ien &= ~BIT(irqd_to_hwirq(data));
216 	gpiochip_disable_irq(chip, irqd_to_hwirq(data));
217 }
218 
kempld_irq_unmask(struct irq_data * data)219 static void kempld_irq_unmask(struct irq_data *data)
220 {
221 	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
222 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
223 
224 	gpiochip_enable_irq(chip, irqd_to_hwirq(data));
225 	gpio->ien |= BIT(irqd_to_hwirq(data));
226 }
227 
kempld_irq_set_type(struct irq_data * data,unsigned int type)228 static int kempld_irq_set_type(struct irq_data *data, unsigned int type)
229 {
230 	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
231 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
232 
233 	switch (type) {
234 	case IRQ_TYPE_EDGE_RISING:
235 		gpio->evt_low_high |= BIT(data->hwirq);
236 		gpio->evt_lvl_edge |= BIT(data->hwirq);
237 		break;
238 	case IRQ_TYPE_EDGE_FALLING:
239 		gpio->evt_low_high &= ~BIT(data->hwirq);
240 		gpio->evt_lvl_edge |= BIT(data->hwirq);
241 		break;
242 	case IRQ_TYPE_LEVEL_HIGH:
243 		gpio->evt_low_high |= BIT(data->hwirq);
244 		gpio->evt_lvl_edge &= ~BIT(data->hwirq);
245 		break;
246 	case IRQ_TYPE_LEVEL_LOW:
247 		gpio->evt_low_high &= ~BIT(data->hwirq);
248 		gpio->evt_lvl_edge &= ~BIT(data->hwirq);
249 		break;
250 	default:
251 		return -EINVAL;
252 	}
253 
254 	return 0;
255 }
256 
kempld_irq_bus_lock(struct irq_data * data)257 static void kempld_irq_bus_lock(struct irq_data *data)
258 {
259 	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
260 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
261 
262 	mutex_lock(&gpio->irq_lock);
263 }
264 
kempld_irq_bus_sync_unlock(struct irq_data * data)265 static void kempld_irq_bus_sync_unlock(struct irq_data *data)
266 {
267 	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
268 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
269 	struct kempld_device_data *pld = gpio->pld;
270 
271 	kempld_get_mutex(pld);
272 	kempld_write16(pld, KEMPLD_GPIO_EVT_LVL_EDGE, gpio->evt_lvl_edge);
273 	kempld_write16(pld, KEMPLD_GPIO_EVT_LOW_HIGH, gpio->evt_low_high);
274 	kempld_write16(pld, KEMPLD_GPIO_IEN, gpio->ien);
275 	kempld_release_mutex(pld);
276 
277 	mutex_unlock(&gpio->irq_lock);
278 }
279 
280 static const struct irq_chip kempld_irqchip = {
281 	.name			= "kempld-gpio",
282 	.irq_mask		= kempld_irq_mask,
283 	.irq_unmask		= kempld_irq_unmask,
284 	.irq_set_type		= kempld_irq_set_type,
285 	.irq_bus_lock		= kempld_irq_bus_lock,
286 	.irq_bus_sync_unlock	= kempld_irq_bus_sync_unlock,
287 	.flags			= IRQCHIP_IMMUTABLE,
288 	GPIOCHIP_IRQ_RESOURCE_HELPERS,
289 };
290 
kempld_gpio_irq_handler(int irq,void * data)291 static irqreturn_t kempld_gpio_irq_handler(int irq, void *data)
292 {
293 	struct kempld_gpio_data *gpio = data;
294 	struct gpio_chip *chip = &gpio->chip;
295 	unsigned int pin, child_irq;
296 	unsigned long status;
297 
298 	kempld_get_mutex(gpio->pld);
299 
300 	status = kempld_read16(gpio->pld, KEMPLD_GPIO_STS);
301 	if (status)
302 		kempld_write16(gpio->pld, KEMPLD_GPIO_STS, status);
303 
304 	kempld_release_mutex(gpio->pld);
305 
306 	status &= gpio->ien;
307 	if (!status)
308 		return IRQ_NONE;
309 
310 	for_each_set_bit(pin, &status, chip->ngpio) {
311 		child_irq = irq_find_mapping(chip->irq.domain, pin);
312 		handle_nested_irq(child_irq);
313 	}
314 
315 	return IRQ_HANDLED;
316 }
317 
kempld_gpio_irq_init(struct device * dev,struct kempld_gpio_data * gpio)318 static int kempld_gpio_irq_init(struct device *dev,
319 				struct kempld_gpio_data *gpio)
320 {
321 	struct kempld_device_data *pld = gpio->pld;
322 	struct gpio_chip *chip = &gpio->chip;
323 	struct gpio_irq_chip *girq;
324 	unsigned int irq;
325 	int ret;
326 
327 	/* Get the IRQ configured by the BIOS in the PLD */
328 	kempld_get_mutex(pld);
329 	irq = kempld_read8(pld, KEMPLD_IRQ_GPIO);
330 	kempld_release_mutex(pld);
331 
332 	if (irq == 0xff) {
333 		dev_info(dev, "GPIO controller has no IRQ support\n");
334 		return 0;
335 	}
336 
337 	/* Allow overriding the IRQ with the module parameter */
338 	if (gpio_irq > 0) {
339 		dev_warn(dev, "Forcing IRQ to %d\n", gpio_irq);
340 		irq &= ~KEMPLD_IRQ_GPIO_MASK;
341 		irq |= gpio_irq & KEMPLD_IRQ_GPIO_MASK;
342 	}
343 
344 	if (!(irq & KEMPLD_IRQ_GPIO_MASK)) {
345 		dev_warn(dev, "No IRQ configured\n");
346 		return 0;
347 	}
348 
349 	/* Get the current config, disable all child interrupts, clear them
350 	 * and set the parent IRQ
351 	 */
352 	kempld_get_mutex(pld);
353 	gpio->evt_low_high = kempld_read16(pld, KEMPLD_GPIO_EVT_LOW_HIGH);
354 	gpio->evt_lvl_edge = kempld_read16(pld, KEMPLD_GPIO_EVT_LVL_EDGE);
355 	kempld_write16(pld, KEMPLD_GPIO_IEN, 0);
356 	kempld_write16(pld, KEMPLD_GPIO_STS, 0xFFFF);
357 	kempld_write16(pld, KEMPLD_IRQ_GPIO, irq);
358 	kempld_release_mutex(pld);
359 
360 	girq = &chip->irq;
361 	gpio_irq_chip_set_chip(girq, &kempld_irqchip);
362 
363 	girq->parent_handler = NULL;
364 	girq->num_parents = 0;
365 	girq->parents = NULL;
366 	girq->default_type = IRQ_TYPE_NONE;
367 	girq->handler = handle_simple_irq;
368 	girq->threaded = true;
369 
370 	mutex_init(&gpio->irq_lock);
371 
372 	ret = devm_request_threaded_irq(dev, irq & KEMPLD_IRQ_GPIO_MASK,
373 					NULL, kempld_gpio_irq_handler,
374 					IRQF_ONESHOT, chip->label,
375 					gpio);
376 	if (ret) {
377 		dev_err(dev, "failed to request irq %d\n", irq);
378 		return ret;
379 	}
380 
381 	return 0;
382 }
383 
kempld_gpio_probe(struct platform_device * pdev)384 static int kempld_gpio_probe(struct platform_device *pdev)
385 {
386 	struct device *dev = &pdev->dev;
387 	struct kempld_device_data *pld = dev_get_drvdata(dev->parent);
388 	struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
389 	struct kempld_gpio_data *gpio;
390 	struct gpio_chip *chip;
391 	int ret;
392 
393 	if (pld->info.spec_major < 2) {
394 		dev_err(dev,
395 			"Driver only supports GPIO devices compatible to PLD spec. rev. 2.0 or higher\n");
396 		return -ENODEV;
397 	}
398 
399 	gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
400 	if (!gpio)
401 		return -ENOMEM;
402 
403 	/* Starting with version 2.8 there is a dedicated register for the
404 	 * output state, earlier versions share the register used to read
405 	 * the line level.
406 	 */
407 	if (pld->info.spec_major > 2 || pld->info.spec_minor >= 8)
408 		gpio->out_lvl_reg = KEMPLD_GPIO_OUT_LVL;
409 	else
410 		gpio->out_lvl_reg = KEMPLD_GPIO_LVL;
411 
412 	gpio->pld = pld;
413 
414 	platform_set_drvdata(pdev, gpio);
415 
416 	chip = &gpio->chip;
417 	chip->label = "gpio-kempld";
418 	chip->owner = THIS_MODULE;
419 	chip->parent = dev;
420 	chip->can_sleep = true;
421 	if (pdata && pdata->gpio_base)
422 		chip->base = pdata->gpio_base;
423 	else
424 		chip->base = -1;
425 	chip->direction_input = kempld_gpio_direction_input;
426 	chip->direction_output = kempld_gpio_direction_output;
427 	chip->get_direction = kempld_gpio_get_direction;
428 	chip->get = kempld_gpio_get;
429 	chip->get_multiple = kempld_gpio_get_multiple;
430 	chip->set = kempld_gpio_set;
431 	chip->set_multiple = kempld_gpio_set_multiple;
432 	chip->ngpio = kempld_gpio_pincount(pld);
433 	if (chip->ngpio == 0) {
434 		dev_err(dev, "No GPIO pins detected\n");
435 		return -ENODEV;
436 	}
437 
438 	ret = kempld_gpio_irq_init(dev, gpio);
439 	if (ret)
440 		return ret;
441 
442 	ret = devm_gpiochip_add_data(dev, chip, gpio);
443 	if (ret) {
444 		dev_err(dev, "Could not register GPIO chip\n");
445 		return ret;
446 	}
447 
448 	dev_info(dev, "GPIO functionality initialized with %d pins\n",
449 		 chip->ngpio);
450 
451 	return 0;
452 }
453 
454 static struct platform_driver kempld_gpio_driver = {
455 	.driver = {
456 		.name = "kempld-gpio",
457 	},
458 	.probe		= kempld_gpio_probe,
459 };
460 
461 module_platform_driver(kempld_gpio_driver);
462 
463 MODULE_DESCRIPTION("KEM PLD GPIO Driver");
464 MODULE_AUTHOR("Michael Brunner <michael.brunner@kontron.com>");
465 MODULE_LICENSE("GPL");
466 MODULE_ALIAS("platform:kempld-gpio");
467