1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2022 Intel Corporation
4 */
5
6 #include "xe_query.h"
7
8 #include <linux/nospec.h>
9 #include <linux/sched/clock.h>
10
11 #include <drm/ttm/ttm_placement.h>
12 #include <generated/xe_wa_oob.h>
13 #include <uapi/drm/xe_drm.h>
14
15 #include "regs/xe_engine_regs.h"
16 #include "regs/xe_gt_regs.h"
17 #include "xe_bo.h"
18 #include "xe_device.h"
19 #include "xe_eu_stall.h"
20 #include "xe_exec_queue.h"
21 #include "xe_force_wake.h"
22 #include "xe_ggtt.h"
23 #include "xe_gt.h"
24 #include "xe_guc_hwconfig.h"
25 #include "xe_macros.h"
26 #include "xe_mmio.h"
27 #include "xe_oa.h"
28 #include "xe_pxp.h"
29 #include "xe_ttm_vram_mgr.h"
30 #include "xe_wa.h"
31
32 static const u16 xe_to_user_engine_class[] = {
33 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
34 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
35 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
36 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
37 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
38 };
39
40 static const enum xe_engine_class user_to_xe_engine_class[] = {
41 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
42 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
43 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
44 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
45 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
46 };
47
calc_hw_engine_info_size(struct xe_device * xe)48 static size_t calc_hw_engine_info_size(struct xe_device *xe)
49 {
50 struct xe_hw_engine *hwe;
51 enum xe_hw_engine_id id;
52 struct xe_gt *gt;
53 u8 gt_id;
54 int i = 0;
55
56 for_each_gt(gt, xe, gt_id)
57 for_each_hw_engine(hwe, gt, id) {
58 if (xe_hw_engine_is_reserved(hwe))
59 continue;
60 i++;
61 }
62
63 return sizeof(struct drm_xe_query_engines) +
64 i * sizeof(struct drm_xe_engine);
65 }
66
67 typedef u64 (*__ktime_func_t)(void);
__clock_id_to_func(clockid_t clk_id)68 static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
69 {
70 /*
71 * Use logic same as the perf subsystem to allow user to select the
72 * reference clock id to be used for timestamps.
73 */
74 switch (clk_id) {
75 case CLOCK_MONOTONIC:
76 return &ktime_get_ns;
77 case CLOCK_MONOTONIC_RAW:
78 return &ktime_get_raw_ns;
79 case CLOCK_REALTIME:
80 return &ktime_get_real_ns;
81 case CLOCK_BOOTTIME:
82 return &ktime_get_boottime_ns;
83 case CLOCK_TAI:
84 return &ktime_get_clocktai_ns;
85 default:
86 return NULL;
87 }
88 }
89
90 static void
hwe_read_timestamp(struct xe_hw_engine * hwe,u64 * engine_ts,u64 * cpu_ts,u64 * cpu_delta,__ktime_func_t cpu_clock)91 hwe_read_timestamp(struct xe_hw_engine *hwe, u64 *engine_ts, u64 *cpu_ts,
92 u64 *cpu_delta, __ktime_func_t cpu_clock)
93 {
94 struct xe_mmio *mmio = &hwe->gt->mmio;
95 u32 upper, lower, old_upper, loop = 0;
96 struct xe_reg upper_reg = RING_TIMESTAMP_UDW(hwe->mmio_base),
97 lower_reg = RING_TIMESTAMP(hwe->mmio_base);
98
99 upper = xe_mmio_read32(mmio, upper_reg);
100 do {
101 *cpu_delta = local_clock();
102 *cpu_ts = cpu_clock();
103 lower = xe_mmio_read32(mmio, lower_reg);
104 *cpu_delta = local_clock() - *cpu_delta;
105 old_upper = upper;
106 upper = xe_mmio_read32(mmio, upper_reg);
107 } while (upper != old_upper && loop++ < 2);
108
109 *engine_ts = (u64)upper << 32 | lower;
110 }
111
112 static int
query_engine_cycles(struct xe_device * xe,struct drm_xe_device_query * query)113 query_engine_cycles(struct xe_device *xe,
114 struct drm_xe_device_query *query)
115 {
116 struct drm_xe_query_engine_cycles __user *query_ptr;
117 struct drm_xe_engine_class_instance *eci;
118 struct drm_xe_query_engine_cycles resp;
119 size_t size = sizeof(resp);
120 __ktime_func_t cpu_clock;
121 struct xe_hw_engine *hwe;
122 struct xe_gt *gt;
123 unsigned int fw_ref;
124
125 if (IS_SRIOV_VF(xe))
126 return -EOPNOTSUPP;
127
128 if (query->size == 0) {
129 query->size = size;
130 return 0;
131 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
132 return -EINVAL;
133 }
134
135 query_ptr = u64_to_user_ptr(query->data);
136 if (copy_from_user(&resp, query_ptr, size))
137 return -EFAULT;
138
139 cpu_clock = __clock_id_to_func(resp.clockid);
140 if (!cpu_clock)
141 return -EINVAL;
142
143 eci = &resp.eci;
144 if (eci->gt_id >= XE_MAX_GT_PER_TILE)
145 return -EINVAL;
146
147 gt = xe_device_get_gt(xe, eci->gt_id);
148 if (!gt)
149 return -EINVAL;
150
151 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
152 return -EINVAL;
153
154 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
155 eci->engine_instance, true);
156 if (!hwe)
157 return -EINVAL;
158
159 fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
160 if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
161 xe_force_wake_put(gt_to_fw(gt), fw_ref);
162 return -EIO;
163 }
164
165 hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp,
166 &resp.cpu_delta, cpu_clock);
167
168 xe_force_wake_put(gt_to_fw(gt), fw_ref);
169
170 if (GRAPHICS_VER(xe) >= 20)
171 resp.width = 64;
172 else
173 resp.width = 36;
174
175 /* Only write to the output fields of user query */
176 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp) ||
177 put_user(resp.cpu_delta, &query_ptr->cpu_delta) ||
178 put_user(resp.engine_cycles, &query_ptr->engine_cycles) ||
179 put_user(resp.width, &query_ptr->width))
180 return -EFAULT;
181
182 return 0;
183 }
184
query_engines(struct xe_device * xe,struct drm_xe_device_query * query)185 static int query_engines(struct xe_device *xe,
186 struct drm_xe_device_query *query)
187 {
188 size_t size = calc_hw_engine_info_size(xe);
189 struct drm_xe_query_engines __user *query_ptr =
190 u64_to_user_ptr(query->data);
191 struct drm_xe_query_engines *engines;
192 struct xe_hw_engine *hwe;
193 enum xe_hw_engine_id id;
194 struct xe_gt *gt;
195 u8 gt_id;
196 int i = 0;
197
198 if (query->size == 0) {
199 query->size = size;
200 return 0;
201 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
202 return -EINVAL;
203 }
204
205 engines = kzalloc(size, GFP_KERNEL);
206 if (!engines)
207 return -ENOMEM;
208
209 for_each_gt(gt, xe, gt_id)
210 for_each_hw_engine(hwe, gt, id) {
211 if (xe_hw_engine_is_reserved(hwe))
212 continue;
213
214 engines->engines[i].instance.engine_class =
215 xe_to_user_engine_class[hwe->class];
216 engines->engines[i].instance.engine_instance =
217 hwe->logical_instance;
218 engines->engines[i].instance.gt_id = gt->info.id;
219
220 i++;
221 }
222
223 engines->num_engines = i;
224
225 if (copy_to_user(query_ptr, engines, size)) {
226 kfree(engines);
227 return -EFAULT;
228 }
229 kfree(engines);
230
231 return 0;
232 }
233
calc_mem_regions_size(struct xe_device * xe)234 static size_t calc_mem_regions_size(struct xe_device *xe)
235 {
236 u32 num_managers = 1;
237 int i;
238
239 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i)
240 if (ttm_manager_type(&xe->ttm, i))
241 num_managers++;
242
243 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]);
244 }
245
query_mem_regions(struct xe_device * xe,struct drm_xe_device_query * query)246 static int query_mem_regions(struct xe_device *xe,
247 struct drm_xe_device_query *query)
248 {
249 size_t size = calc_mem_regions_size(xe);
250 struct drm_xe_query_mem_regions *mem_regions;
251 struct drm_xe_query_mem_regions __user *query_ptr =
252 u64_to_user_ptr(query->data);
253 struct ttm_resource_manager *man;
254 int ret, i;
255
256 if (query->size == 0) {
257 query->size = size;
258 return 0;
259 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
260 return -EINVAL;
261 }
262
263 mem_regions = kzalloc(size, GFP_KERNEL);
264 if (XE_IOCTL_DBG(xe, !mem_regions))
265 return -ENOMEM;
266
267 man = ttm_manager_type(&xe->ttm, XE_PL_TT);
268 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
269 /*
270 * The instance needs to be a unique number that represents the index
271 * in the placement mask used at xe_gem_create_ioctl() for the
272 * xe_bo_create() placement.
273 */
274 mem_regions->mem_regions[0].instance = 0;
275 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE;
276 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT;
277 if (perfmon_capable())
278 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man);
279 mem_regions->num_mem_regions = 1;
280
281 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
282 man = ttm_manager_type(&xe->ttm, i);
283 if (man) {
284 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class =
285 DRM_XE_MEM_REGION_CLASS_VRAM;
286 mem_regions->mem_regions[mem_regions->num_mem_regions].instance =
287 mem_regions->num_mem_regions;
288 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size =
289 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ?
290 SZ_64K : PAGE_SIZE;
291 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size =
292 man->size;
293
294 if (perfmon_capable()) {
295 xe_ttm_vram_get_used(man,
296 &mem_regions->mem_regions
297 [mem_regions->num_mem_regions].used,
298 &mem_regions->mem_regions
299 [mem_regions->num_mem_regions].cpu_visible_used);
300 }
301
302 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size =
303 xe_ttm_vram_get_cpu_visible_size(man);
304 mem_regions->num_mem_regions++;
305 }
306 }
307
308 if (!copy_to_user(query_ptr, mem_regions, size))
309 ret = 0;
310 else
311 ret = -ENOSPC;
312
313 kfree(mem_regions);
314 return ret;
315 }
316
query_config(struct xe_device * xe,struct drm_xe_device_query * query)317 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
318 {
319 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
320 size_t size =
321 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
322 struct drm_xe_query_config __user *query_ptr =
323 u64_to_user_ptr(query->data);
324 struct drm_xe_query_config *config;
325
326 if (query->size == 0) {
327 query->size = size;
328 return 0;
329 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
330 return -EINVAL;
331 }
332
333 config = kzalloc(size, GFP_KERNEL);
334 if (!config)
335 return -ENOMEM;
336
337 config->num_params = num_params;
338 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
339 xe->info.devid | (xe->info.revid << 16);
340 if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
341 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
342 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
343 if (xe->info.has_usm && IS_ENABLED(CONFIG_DRM_GPUSVM))
344 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
345 DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR;
346 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
347 DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
348 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
349 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
350 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
351 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
352 xe_exec_queue_device_get_max_priority(xe);
353
354 if (copy_to_user(query_ptr, config, size)) {
355 kfree(config);
356 return -EFAULT;
357 }
358 kfree(config);
359
360 return 0;
361 }
362
query_gt_list(struct xe_device * xe,struct drm_xe_device_query * query)363 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query)
364 {
365 struct xe_gt *gt;
366 size_t size = sizeof(struct drm_xe_query_gt_list) +
367 xe->info.gt_count * sizeof(struct drm_xe_gt);
368 struct drm_xe_query_gt_list __user *query_ptr =
369 u64_to_user_ptr(query->data);
370 struct drm_xe_query_gt_list *gt_list;
371 u8 id;
372
373 if (query->size == 0) {
374 query->size = size;
375 return 0;
376 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
377 return -EINVAL;
378 }
379
380 gt_list = kzalloc(size, GFP_KERNEL);
381 if (!gt_list)
382 return -ENOMEM;
383
384 gt_list->num_gt = xe->info.gt_count;
385
386 for_each_gt(gt, xe, id) {
387 if (xe_gt_is_media_type(gt))
388 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
389 else
390 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
391 gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id;
392 gt_list->gt_list[id].gt_id = gt->info.id;
393 gt_list->gt_list[id].reference_clock = gt->info.reference_clock;
394 /*
395 * The mem_regions indexes in the mask below need to
396 * directly identify the struct
397 * drm_xe_query_mem_regions' instance constructed at
398 * query_mem_regions()
399 *
400 * For our current platforms:
401 * Bit 0 -> System Memory
402 * Bit 1 -> VRAM0 on Tile0
403 * Bit 2 -> VRAM1 on Tile1
404 * However the uAPI is generic and it's userspace's
405 * responsibility to check the mem_class, without any
406 * assumption.
407 */
408 if (!IS_DGFX(xe))
409 gt_list->gt_list[id].near_mem_regions = 0x1;
410 else
411 gt_list->gt_list[id].near_mem_regions =
412 BIT(gt_to_tile(gt)->id) << 1;
413 gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
414 gt_list->gt_list[id].near_mem_regions;
415
416 gt_list->gt_list[id].ip_ver_major =
417 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid);
418 gt_list->gt_list[id].ip_ver_minor =
419 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid);
420 gt_list->gt_list[id].ip_ver_rev =
421 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid);
422 }
423
424 if (copy_to_user(query_ptr, gt_list, size)) {
425 kfree(gt_list);
426 return -EFAULT;
427 }
428 kfree(gt_list);
429
430 return 0;
431 }
432
query_hwconfig(struct xe_device * xe,struct drm_xe_device_query * query)433 static int query_hwconfig(struct xe_device *xe,
434 struct drm_xe_device_query *query)
435 {
436 struct xe_gt *gt = xe_root_mmio_gt(xe);
437 size_t size = xe_guc_hwconfig_size(>->uc.guc);
438 void __user *query_ptr = u64_to_user_ptr(query->data);
439 void *hwconfig;
440
441 if (query->size == 0) {
442 query->size = size;
443 return 0;
444 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
445 return -EINVAL;
446 }
447
448 hwconfig = kzalloc(size, GFP_KERNEL);
449 if (!hwconfig)
450 return -ENOMEM;
451
452 xe_guc_hwconfig_copy(>->uc.guc, hwconfig);
453
454 if (copy_to_user(query_ptr, hwconfig, size)) {
455 kfree(hwconfig);
456 return -EFAULT;
457 }
458 kfree(hwconfig);
459
460 return 0;
461 }
462
calc_topo_query_size(struct xe_device * xe)463 static size_t calc_topo_query_size(struct xe_device *xe)
464 {
465 struct xe_gt *gt;
466 size_t query_size = 0;
467 int id;
468
469 for_each_gt(gt, xe, id) {
470 query_size += 3 * sizeof(struct drm_xe_query_topology_mask) +
471 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) +
472 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) +
473 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss);
474
475 /* L3bank mask may not be available for some GTs */
476 if (!XE_WA(gt, no_media_l3))
477 query_size += sizeof(struct drm_xe_query_topology_mask) +
478 sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask);
479 }
480
481 return query_size;
482 }
483
copy_mask(void __user ** ptr,struct drm_xe_query_topology_mask * topo,void * mask,size_t mask_size)484 static int copy_mask(void __user **ptr,
485 struct drm_xe_query_topology_mask *topo,
486 void *mask, size_t mask_size)
487 {
488 topo->num_bytes = mask_size;
489
490 if (copy_to_user(*ptr, topo, sizeof(*topo)))
491 return -EFAULT;
492 *ptr += sizeof(topo);
493
494 if (copy_to_user(*ptr, mask, mask_size))
495 return -EFAULT;
496 *ptr += mask_size;
497
498 return 0;
499 }
500
query_gt_topology(struct xe_device * xe,struct drm_xe_device_query * query)501 static int query_gt_topology(struct xe_device *xe,
502 struct drm_xe_device_query *query)
503 {
504 void __user *query_ptr = u64_to_user_ptr(query->data);
505 size_t size = calc_topo_query_size(xe);
506 struct drm_xe_query_topology_mask topo;
507 struct xe_gt *gt;
508 int id;
509
510 if (query->size == 0) {
511 query->size = size;
512 return 0;
513 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
514 return -EINVAL;
515 }
516
517 for_each_gt(gt, xe, id) {
518 int err;
519
520 topo.gt_id = id;
521
522 topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
523 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
524 sizeof(gt->fuse_topo.g_dss_mask));
525 if (err)
526 return err;
527
528 topo.type = DRM_XE_TOPO_DSS_COMPUTE;
529 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
530 sizeof(gt->fuse_topo.c_dss_mask));
531 if (err)
532 return err;
533
534 /*
535 * If the kernel doesn't have a way to obtain a correct L3bank
536 * mask, then it's better to omit L3 from the query rather than
537 * reporting bogus or zeroed information to userspace.
538 */
539 if (!XE_WA(gt, no_media_l3)) {
540 topo.type = DRM_XE_TOPO_L3_BANK;
541 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask,
542 sizeof(gt->fuse_topo.l3_bank_mask));
543 if (err)
544 return err;
545 }
546
547 topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ?
548 DRM_XE_TOPO_SIMD16_EU_PER_DSS :
549 DRM_XE_TOPO_EU_PER_DSS;
550 err = copy_mask(&query_ptr, &topo,
551 gt->fuse_topo.eu_mask_per_dss,
552 sizeof(gt->fuse_topo.eu_mask_per_dss));
553 if (err)
554 return err;
555 }
556
557 return 0;
558 }
559
560 static int
query_uc_fw_version(struct xe_device * xe,struct drm_xe_device_query * query)561 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
562 {
563 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
564 size_t size = sizeof(struct drm_xe_query_uc_fw_version);
565 struct drm_xe_query_uc_fw_version resp;
566 struct xe_uc_fw_version *version = NULL;
567
568 if (query->size == 0) {
569 query->size = size;
570 return 0;
571 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
572 return -EINVAL;
573 }
574
575 if (copy_from_user(&resp, query_ptr, size))
576 return -EFAULT;
577
578 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
579 return -EINVAL;
580
581 switch (resp.uc_type) {
582 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
583 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
584
585 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
586 break;
587 }
588 case XE_QUERY_UC_TYPE_HUC: {
589 struct xe_gt *media_gt = NULL;
590 struct xe_huc *huc;
591
592 if (MEDIA_VER(xe) >= 13) {
593 struct xe_tile *tile;
594 u8 gt_id;
595
596 for_each_tile(tile, xe, gt_id) {
597 if (tile->media_gt) {
598 media_gt = tile->media_gt;
599 break;
600 }
601 }
602 } else {
603 media_gt = xe->tiles[0].primary_gt;
604 }
605
606 if (!media_gt)
607 break;
608
609 huc = &media_gt->uc.huc;
610 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING)
611 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE];
612 break;
613 }
614 default:
615 return -EINVAL;
616 }
617
618 if (version) {
619 resp.branch_ver = 0;
620 resp.major_ver = version->major;
621 resp.minor_ver = version->minor;
622 resp.patch_ver = version->patch;
623 } else {
624 return -ENODEV;
625 }
626
627 if (copy_to_user(query_ptr, &resp, size))
628 return -EFAULT;
629
630 return 0;
631 }
632
calc_oa_unit_query_size(struct xe_device * xe)633 static size_t calc_oa_unit_query_size(struct xe_device *xe)
634 {
635 size_t size = sizeof(struct drm_xe_query_oa_units);
636 struct xe_gt *gt;
637 int i, id;
638
639 for_each_gt(gt, xe, id) {
640 for (i = 0; i < gt->oa.num_oa_units; i++) {
641 size += sizeof(struct drm_xe_oa_unit);
642 size += gt->oa.oa_unit[i].num_engines *
643 sizeof(struct drm_xe_engine_class_instance);
644 }
645 }
646
647 return size;
648 }
649
query_oa_units(struct xe_device * xe,struct drm_xe_device_query * query)650 static int query_oa_units(struct xe_device *xe,
651 struct drm_xe_device_query *query)
652 {
653 void __user *query_ptr = u64_to_user_ptr(query->data);
654 size_t size = calc_oa_unit_query_size(xe);
655 struct drm_xe_query_oa_units *qoa;
656 enum xe_hw_engine_id hwe_id;
657 struct drm_xe_oa_unit *du;
658 struct xe_hw_engine *hwe;
659 struct xe_oa_unit *u;
660 int gt_id, i, j, ret;
661 struct xe_gt *gt;
662 u8 *pdu;
663
664 if (query->size == 0) {
665 query->size = size;
666 return 0;
667 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
668 return -EINVAL;
669 }
670
671 qoa = kzalloc(size, GFP_KERNEL);
672 if (!qoa)
673 return -ENOMEM;
674
675 pdu = (u8 *)&qoa->oa_units[0];
676 for_each_gt(gt, xe, gt_id) {
677 for (i = 0; i < gt->oa.num_oa_units; i++) {
678 u = >->oa.oa_unit[i];
679 du = (struct drm_xe_oa_unit *)pdu;
680
681 du->oa_unit_id = u->oa_unit_id;
682 du->oa_unit_type = u->type;
683 du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
684 du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS |
685 DRM_XE_OA_CAPS_OA_BUFFER_SIZE |
686 DRM_XE_OA_CAPS_WAIT_NUM_REPORTS;
687
688 j = 0;
689 for_each_hw_engine(hwe, gt, hwe_id) {
690 if (!xe_hw_engine_is_reserved(hwe) &&
691 xe_oa_unit_id(hwe) == u->oa_unit_id) {
692 du->eci[j].engine_class =
693 xe_to_user_engine_class[hwe->class];
694 du->eci[j].engine_instance = hwe->logical_instance;
695 du->eci[j].gt_id = gt->info.id;
696 j++;
697 }
698 }
699 du->num_engines = j;
700 pdu += sizeof(*du) + j * sizeof(du->eci[0]);
701 qoa->num_oa_units++;
702 }
703 }
704
705 ret = copy_to_user(query_ptr, qoa, size);
706 kfree(qoa);
707
708 return ret ? -EFAULT : 0;
709 }
710
query_pxp_status(struct xe_device * xe,struct drm_xe_device_query * query)711 static int query_pxp_status(struct xe_device *xe, struct drm_xe_device_query *query)
712 {
713 struct drm_xe_query_pxp_status __user *query_ptr = u64_to_user_ptr(query->data);
714 size_t size = sizeof(struct drm_xe_query_pxp_status);
715 struct drm_xe_query_pxp_status resp = { 0 };
716 int ret;
717
718 if (query->size == 0) {
719 query->size = size;
720 return 0;
721 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
722 return -EINVAL;
723 }
724
725 ret = xe_pxp_get_readiness_status(xe->pxp);
726 if (ret < 0)
727 return ret;
728
729 resp.status = ret;
730 resp.supported_session_types = BIT(DRM_XE_PXP_TYPE_HWDRM);
731
732 if (copy_to_user(query_ptr, &resp, size))
733 return -EFAULT;
734
735 return 0;
736 }
737
query_eu_stall(struct xe_device * xe,struct drm_xe_device_query * query)738 static int query_eu_stall(struct xe_device *xe,
739 struct drm_xe_device_query *query)
740 {
741 void __user *query_ptr = u64_to_user_ptr(query->data);
742 struct drm_xe_query_eu_stall *info;
743 size_t size, array_size;
744 const u64 *rates;
745 u32 num_rates;
746 int ret;
747
748 if (!xe_eu_stall_supported_on_platform(xe)) {
749 drm_dbg(&xe->drm, "EU stall monitoring is not supported on this platform\n");
750 return -ENODEV;
751 }
752
753 array_size = xe_eu_stall_get_sampling_rates(&num_rates, &rates);
754 size = sizeof(struct drm_xe_query_eu_stall) + array_size;
755
756 if (query->size == 0) {
757 query->size = size;
758 return 0;
759 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
760 return -EINVAL;
761 }
762
763 info = kzalloc(size, GFP_KERNEL);
764 if (!info)
765 return -ENOMEM;
766
767 info->num_sampling_rates = num_rates;
768 info->capabilities = DRM_XE_EU_STALL_CAPS_BASE;
769 info->record_size = xe_eu_stall_data_record_size(xe);
770 info->per_xecore_buf_size = xe_eu_stall_get_per_xecore_buf_size();
771 memcpy(info->sampling_rates, rates, array_size);
772
773 ret = copy_to_user(query_ptr, info, size);
774 kfree(info);
775
776 return ret ? -EFAULT : 0;
777 }
778
779 static int (* const xe_query_funcs[])(struct xe_device *xe,
780 struct drm_xe_device_query *query) = {
781 query_engines,
782 query_mem_regions,
783 query_config,
784 query_gt_list,
785 query_hwconfig,
786 query_gt_topology,
787 query_engine_cycles,
788 query_uc_fw_version,
789 query_oa_units,
790 query_pxp_status,
791 query_eu_stall,
792 };
793
xe_query_ioctl(struct drm_device * dev,void * data,struct drm_file * file)794 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
795 {
796 struct xe_device *xe = to_xe_device(dev);
797 struct drm_xe_device_query *query = data;
798 u32 idx;
799
800 if (XE_IOCTL_DBG(xe, query->extensions) ||
801 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1]))
802 return -EINVAL;
803
804 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs)))
805 return -EINVAL;
806
807 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs));
808 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx]))
809 return -EINVAL;
810
811 return xe_query_funcs[idx](xe, query);
812 }
813