xref: /linux/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi (revision 6589b3d76db2d6adbf8f2084c303fb24252a0dc6)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) Siemens AG, 2018-2024
4 *
5 * Authors:
6 *   Le Jin <le.jin@siemens.com>
7 *   Jan Kiszka <jan.kiszka@siemens.com>
8 *
9 * Common bits of the IOT2050 Basic and Advanced variants, PG1 and PG2
10 */
11
12#include <dt-bindings/leds/common.h>
13#include <dt-bindings/phy/phy.h>
14#include <dt-bindings/net/ti-dp83867.h>
15
16/ {
17	aliases {
18		serial0 = &wkup_uart0;
19		serial1 = &mcu_uart0;
20		serial2 = &main_uart0;
21		serial3 = &main_uart1;
22		i2c0 = &wkup_i2c0;
23		i2c1 = &mcu_i2c0;
24		i2c2 = &main_i2c0;
25		i2c3 = &main_i2c1;
26		i2c4 = &main_i2c2;
27		i2c5 = &main_i2c3;
28		spi0 = &mcu_spi0;
29		mmc0 = &sdhci1;
30		mmc1 = &sdhci0;
31		ethernet1 = &icssg0_emac0;
32		ethernet2 = &icssg0_emac1;
33	};
34
35	chosen {
36		stdout-path = "serial3:115200n8";
37	};
38
39	reserved_memory: reserved-memory {
40		#address-cells = <2>;
41		#size-cells = <2>;
42		ranges;
43
44		secure_ddr: secure-ddr@9e800000 {
45			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
46			alignment = <0x1000>;
47			no-map;
48		};
49
50		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {
51			compatible = "shared-dma-pool";
52			reg = <0 0xa0000000 0 0x100000>;
53			no-map;
54		};
55
56		mcu_r5fss0_core0_memory_region: memory@a0100000 {
57			compatible = "shared-dma-pool";
58			reg = <0 0xa0100000 0 0xf00000>;
59			no-map;
60		};
61
62		/* To reserve the power-on(PON) reason for watchdog reset */
63		wdt_reset_memory_region: wdt-memory@a2200000 {
64			reg = <0x00 0xa2200000 0x00 0x1000>;
65			no-map;
66		};
67	};
68
69	leds {
70		compatible = "gpio-leds";
71		pinctrl-names = "default";
72		pinctrl-0 = <&leds_pins_default>;
73
74		led-0 {
75			color = <LED_COLOR_ID_RED>;
76			function = LED_FUNCTION_STATUS;
77			label = "status-led-red";
78			gpios = <&wkup_gpio0 32 GPIO_ACTIVE_HIGH>;
79			panic-indicator;
80		};
81
82		led-1 {
83			color = <LED_COLOR_ID_GREEN>;
84			function = LED_FUNCTION_STATUS;
85			label = "status-led-green";
86			gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>;
87		};
88
89		led-2 {
90			color = <LED_COLOR_ID_RED>;
91			function = LED_FUNCTION_INDICATOR;
92			label = "user-led1-red";
93			gpios = <&pcal9535_3 14 GPIO_ACTIVE_HIGH>;
94		};
95
96		led-3 {
97			color = <LED_COLOR_ID_GREEN>;
98			function = LED_FUNCTION_INDICATOR;
99			label = "user-led1-green";
100			gpios = <&pcal9535_2 15 GPIO_ACTIVE_HIGH>;
101		};
102
103		led-4 {
104			color = <LED_COLOR_ID_RED>;
105			function = LED_FUNCTION_INDICATOR;
106			label = "user-led2-red";
107			gpios = <&wkup_gpio0 17 GPIO_ACTIVE_HIGH>;
108		};
109
110		led-5 {
111			color = <LED_COLOR_ID_RED>;
112			function = LED_FUNCTION_INDICATOR;
113			label = "user-led2-green";
114			gpios = <&wkup_gpio0 22 GPIO_ACTIVE_HIGH>;
115		};
116	};
117
118	dp_refclk: clock {
119		compatible = "fixed-clock";
120		#clock-cells = <0>;
121		clock-frequency = <19200000>;
122	};
123
124	/* Dual Ethernet application node on PRU-ICSSG0 */
125	icssg0_eth: icssg0-eth {
126		compatible = "ti,am654-icssg-prueth";
127		pinctrl-names = "default";
128		pinctrl-0 = <&icssg0_rgmii_pins_default>;
129		sram = <&msmc_ram>;
130
131		ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>,
132			<&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
133		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
134				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
135				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
136				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
137				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
138				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
139
140		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
141				      <2>,
142				      <2>,
143				      <2>,	/* MII mode */
144				      <2>,
145				      <2>;
146
147		ti,mii-g-rt = <&icssg0_mii_g_rt>;
148		ti,mii-rt = <&icssg0_mii_rt>;
149		ti,iep = <&icssg0_iep0>,  <&icssg0_iep1>;
150
151		interrupt-parent = <&icssg0_intc>;
152		interrupts = <24 0 2>, <25 1 3>;
153		interrupt-names = "tx_ts0", "tx_ts1";
154
155		dmas = <&main_udmap 0xc100>, /* egress slice 0 */
156		       <&main_udmap 0xc101>, /* egress slice 0 */
157		       <&main_udmap 0xc102>, /* egress slice 0 */
158		       <&main_udmap 0xc103>, /* egress slice 0 */
159		       <&main_udmap 0xc104>, /* egress slice 1 */
160		       <&main_udmap 0xc105>, /* egress slice 1 */
161		       <&main_udmap 0xc106>, /* egress slice 1 */
162		       <&main_udmap 0xc107>, /* egress slice 1 */
163		       <&main_udmap 0x4100>, /* ingress slice 0 */
164		       <&main_udmap 0x4101>; /* ingress slice 1 */
165		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
166			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
167			    "rx0", "rx1";
168
169		ethernet-ports {
170			#address-cells = <1>;
171			#size-cells = <0>;
172			icssg0_emac0: port@0 {
173				reg = <0>;
174				phy-handle = <&icssg0_eth0_phy>;
175				phy-mode = "rgmii-id";
176				ti,syscon-rgmii-delay = <&scm_conf 0x4100>;
177				ti,half-duplex-capable;
178				/* Filled in by bootloader */
179				local-mac-address = [00 00 00 00 00 00];
180			};
181
182			icssg0_emac1: port@1 {
183				reg = <1>;
184				phy-handle = <&icssg0_eth1_phy>;
185				phy-mode = "rgmii-id";
186				ti,syscon-rgmii-delay = <&scm_conf 0x4104>;
187				ti,half-duplex-capable;
188				/* Filled in by bootloader */
189				local-mac-address = [00 00 00 00 00 00];
190			};
191		};
192	};
193};
194
195&wkup_pmx0 {
196	mcu_i2c0_pins_default: mcu-i2c0-default-pins {
197		pinctrl-single,pins = <
198			/* (AD8) MCU_I2C0_SCL */
199			AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT,  0)
200			/* (AD7) MCU_I2C0_SDA */
201			AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT,  0)
202		>;
203	};
204
205	push_button_pins_default: push-button-default-pins {
206		pinctrl-single,pins = <
207			/* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
208			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT,  7)
209		>;
210	};
211
212	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
213		pinctrl-single,pins = <
214			/* (V1) MCU_OSPI0_CLK */
215			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0)
216			/* (U2) MCU_OSPI0_DQS */
217			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT,  0)
218			/* (U4) MCU_OSPI0_D0 */
219			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT,  0)
220			/* (U5) MCU_OSPI0_D1 */
221			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT,  0)
222			/* (R4) MCU_OSPI0_CSn0 */
223			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0)
224		>;
225	};
226
227	db9_com_mode_pins_default: db9-com-mode-default-pins {
228		pinctrl-single,pins = <
229			/* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */
230			AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7)
231			/* (AC3) WKUP_GPIO0_4, used as uart0 mode 1 */
232			AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7)
233			/* (AC1) WKUP_GPIO0_7, used as uart0 term */
234			AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7)
235			/* (AC2) WKUP_GPIO0_6, used as uart0 en */
236			AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7)
237		>;
238	};
239
240	leds_pins_default: leds-default-pins {
241		pinctrl-single,pins = <
242			/* (T2) WKUP_GPIO0_17, used as user led1 red */
243			AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7)
244			/* (R3) WKUP_GPIO0_22, used as user led1 green */
245			AM65X_WKUP_IOPAD(0x0028, PIN_OUTPUT, 7)
246			/* (R5) WKUP_GPIO0_24, used as status led red */
247			AM65X_WKUP_IOPAD(0x0030, PIN_OUTPUT, 7)
248			/* (N2) WKUP_GPIO0_32, used as status led green */
249			AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7)
250		>;
251	};
252
253	mcu_spi0_pins_default: mcu-spi0-default-pins {
254		pinctrl-single,pins = <
255			/* (Y1) MCU_SPI0_CLK */
256			AM65X_WKUP_IOPAD(0x0090, PIN_INPUT,  0)
257			/* (Y3) MCU_SPI0_D0 */
258			AM65X_WKUP_IOPAD(0x0094, PIN_INPUT,  0)
259			/* (Y2) MCU_SPI0_D1 */
260			AM65X_WKUP_IOPAD(0x0098, PIN_INPUT,  0)
261			/* (Y4) MCU_SPI0_CS0 */
262			AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0)
263		>;
264	};
265
266	minipcie_pins_default: minipcie-default-pins {
267		pinctrl-single,pins = <
268			/* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */
269			AM65X_WKUP_IOPAD(0x003c, PIN_OUTPUT, 7)
270		>;
271	};
272};
273
274&main_pmx0 {
275	main_pcie_enable_pins_default: main-pcie-enable-default-pins {
276		pinctrl-single,pins = <
277			AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7)  /* (AH13) GPIO1_17 */
278		>;
279	};
280
281	main_uart1_pins_default: main-uart1-default-pins {
282		pinctrl-single,pins = <
283			AM65X_IOPAD(0x0174, PIN_INPUT,  6)  /* (AE23) UART1_RXD */
284			AM65X_IOPAD(0x014c, PIN_OUTPUT, 6)  /* (AD23) UART1_TXD */
285			AM65X_IOPAD(0x0178, PIN_INPUT,  6)  /* (AD22) UART1_CTSn */
286			AM65X_IOPAD(0x017c, PIN_OUTPUT, 6)  /* (AC21) UART1_RTSn */
287		>;
288	};
289
290	main_i2c3_pins_default: main-i2c3-default-pins {
291		pinctrl-single,pins = <
292			AM65X_IOPAD(0x01c0, PIN_INPUT,  2)  /* (AF13) I2C3_SCL */
293			AM65X_IOPAD(0x01d4, PIN_INPUT,  2)  /* (AG12) I2C3_SDA */
294		>;
295	};
296
297	main_mmc1_pins_default: main-mmc1-default-pins {
298		pinctrl-single,pins = <
299			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0)  /* (C27) MMC1_CLK */
300			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP,   0)  /* (C28) MMC1_CMD */
301			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP,   0)  /* (D28) MMC1_DAT0 */
302			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP,   0)  /* (E27) MMC1_DAT1 */
303			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP,   0)  /* (D26) MMC1_DAT2 */
304			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP,   0)  /* (D27) MMC1_DAT3 */
305			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP,   0)  /* (B24) MMC1_SDCD */
306			AM65X_IOPAD(0x02e0, PIN_INPUT_PULLUP,   0)  /* (C24) MMC1_SDWP */
307		>;
308	};
309
310	usb0_pins_default: usb0-default-pins {
311		pinctrl-single,pins = <
312			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0)  /* (AD9) USB0_DRVVBUS */
313		>;
314	};
315
316	usb1_pins_default: usb1-default-pins {
317		pinctrl-single,pins = <
318			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0)  /* (AC8) USB1_DRVVBUS */
319		>;
320	};
321
322	main_i2c2_pins_default: main-i2c2-default-pins {
323		pinctrl-single,pins = <
324			AM65X_IOPAD(0x0074, PIN_INPUT,  5)  /* (T27) I2C2_SCL */
325			AM65X_IOPAD(0x0070, PIN_INPUT,  5)  /* (R25) I2C2_SDA */
326		>;
327	};
328
329	icssg0_mdio_pins_default: icssg0-mdio-default-pins {
330		pinctrl-single,pins = <
331			AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */
332			AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */
333		>;
334	};
335
336	icssg0_rgmii_pins_default: icssg0-rgmii-default-pins {
337		pinctrl-single,pins = <
338			AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
339			AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
340			AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
341			AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
342			AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */
343			AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */
344			AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */
345			AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */
346			AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
347			AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */
348			AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
349			AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
350
351			AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
352			AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
353			AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
354			AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
355			AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */
356			AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */
357			AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */
358			AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */
359			AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
360			AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */
361			AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
362			AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
363		>;
364	};
365};
366
367&main_pmx1 {
368	main_i2c0_pins_default: main-i2c0-default-pins {
369		pinctrl-single,pins = <
370			AM65X_IOPAD(0x0000, PIN_INPUT,  0)  /* (D20) I2C0_SCL */
371			AM65X_IOPAD(0x0004, PIN_INPUT,  0)  /* (C21) I2C0_SDA */
372		>;
373	};
374
375	main_i2c1_pins_default: main-i2c1-default-pins {
376		pinctrl-single,pins = <
377			AM65X_IOPAD(0x0008, PIN_INPUT,  0)  /* (B21) I2C1_SCL */
378			AM65X_IOPAD(0x000c, PIN_INPUT,  0)  /* (E21) I2C1_SDA */
379		>;
380	};
381};
382
383&wkup_uart0 {
384	/* Wakeup UART is used by System firmware */
385	status = "reserved";
386};
387
388&main_uart1 {
389	status = "okay";
390	pinctrl-names = "default";
391	pinctrl-0 = <&main_uart1_pins_default>;
392};
393
394&main_gpio1 {
395	pinctrl-names = "default";
396	pinctrl-0 = <&main_pcie_enable_pins_default>;
397};
398
399&mcu_i2c0 {
400	status = "okay";
401	pinctrl-names = "default";
402	pinctrl-0 = <&mcu_i2c0_pins_default>;
403	clock-frequency = <400000>;
404
405	psu: regulator@60 {
406		compatible = "ti,tps62363";
407		reg = <0x60>;
408		regulator-name = "tps62363-vout";
409		regulator-min-microvolt = <500000>;
410		regulator-max-microvolt = <1500000>;
411		regulator-boot-on;
412		ti,vsel0-state-high;
413		ti,vsel1-state-high;
414		ti,enable-vout-discharge;
415	};
416};
417
418&main_i2c0 {
419	status = "okay";
420	pinctrl-names = "default";
421	pinctrl-0 = <&main_i2c0_pins_default>;
422	clock-frequency = <400000>;
423
424	rtc: rtc@51 {
425		compatible = "nxp,pcf8563";
426		reg = <0x51>;
427	};
428
429	eeprom: eeprom@54 {
430		compatible = "atmel,24c08";
431		reg = <0x54>;
432		pagesize = <16>;
433	};
434};
435
436&main_i2c1 {
437	status = "okay";
438	pinctrl-names = "default";
439	pinctrl-0 = <&main_i2c1_pins_default>;
440	clock-frequency = <400000>;
441};
442
443&main_i2c2 {
444	status = "okay";
445	pinctrl-names = "default";
446	pinctrl-0 = <&main_i2c2_pins_default>;
447	clock-frequency = <400000>;
448};
449
450&main_i2c3 {
451	status = "okay";
452	pinctrl-names = "default";
453	pinctrl-0 = <&main_i2c3_pins_default>;
454	clock-frequency = <400000>;
455
456	#address-cells = <1>;
457	#size-cells = <0>;
458};
459
460&sdhci1 {
461	status = "okay";
462	pinctrl-names = "default";
463	pinctrl-0 = <&main_mmc1_pins_default>;
464	ti,driver-strength-ohm = <50>;
465	disable-wp;
466};
467
468&usb0 {
469	pinctrl-names = "default";
470	pinctrl-0 = <&usb0_pins_default>;
471	dr_mode = "host";
472};
473
474&usb1 {
475	pinctrl-names = "default";
476	pinctrl-0 = <&usb1_pins_default>;
477	dr_mode = "host";
478};
479
480&mcu_spi0 {
481	status = "okay";
482	#address-cells = <1>;
483	#size-cells = <0>;
484	ti,pindir-d0-out-d1-in;
485};
486
487&ospi0 {
488	status = "okay";
489	pinctrl-names = "default";
490	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
491
492	flash@0 {
493		compatible = "jedec,spi-nor";
494		reg = <0x0>;
495		spi-tx-bus-width = <1>;
496		spi-rx-bus-width = <1>;
497		spi-max-frequency = <50000000>;
498		cdns,tshsl-ns = <60>;
499		cdns,tsd2d-ns = <60>;
500		cdns,tchsh-ns = <60>;
501		cdns,tslch-ns = <60>;
502		cdns,read-delay = <2>;
503
504		partitions {
505			compatible = "fixed-partitions";
506			#address-cells = <1>;
507			#size-cells = <1>;
508
509			seboot@0 {
510				label = "seboot";
511				reg = <0x0 0x180000>; /* 1.5M */
512			};
513
514			tispl@180000 {
515				label = "tispl";
516				reg = <0x180000 0x200000>; /* 2M */
517			};
518
519			u-boot@380000 {
520				label = "u-boot";
521				reg = <0x380000 0x300000>; /* 3M */
522			};
523
524			env@680000 {
525				label = "env";
526				reg = <0x680000 0x20000>; /* 128K */
527			};
528
529			env-backup@6a0000 {
530				label = "env.backup";
531				reg = <0x6a0000 0x20000>; /* 128K */
532			};
533
534			otpcmd@6c0000 {
535				label = "otpcmd";
536				reg = <0x6c0000 0x10000>; /* 64K */
537			};
538
539			unused@6d0000 {
540				label = "unused";
541				reg = <0x6d0000 0x7b0000>; /* 7872K */
542			};
543
544			seboot-backup@e80000 {
545				label = "seboot.backup";
546				reg = <0xe80000 0x180000>; /* 1.5M */
547			};
548		};
549	};
550};
551
552&pcie1_rc {
553	status = "okay";
554	pinctrl-names = "default";
555	pinctrl-0 = <&minipcie_pins_default>;
556
557	num-lanes = <1>;
558	phys = <&serdes1 PHY_TYPE_PCIE 0>;
559	phy-names = "pcie-phy0";
560	reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
561};
562
563&mcu_rti1 {
564	memory-region = <&wdt_reset_memory_region>;
565};
566
567&icssg0_mdio {
568	status = "okay";
569	pinctrl-names = "default";
570	pinctrl-0 = <&icssg0_mdio_pins_default>;
571
572	icssg0_eth0_phy: ethernet-phy@0 {
573		reg = <0>;
574		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
575		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
576
577		leds {
578			#address-cells = <1>;
579			#size-cells = <0>;
580
581			led@0 {
582				reg = <0>;
583				color = <LED_COLOR_ID_GREEN>;
584				function = LED_FUNCTION_LAN;
585			};
586
587			led@1 {
588				reg = <1>;
589				color = <LED_COLOR_ID_GREEN>;
590				function = LED_FUNCTION_SPEED_LAN;
591			};
592
593			led@2 {
594				reg = <2>;
595				color = <LED_COLOR_ID_YELLOW>;
596				function = LED_FUNCTION_SPEED_LAN;
597			};
598		};
599	};
600
601	icssg0_eth1_phy: ethernet-phy@1 {
602		reg = <1>;
603		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
604		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
605
606		leds {
607			#address-cells = <1>;
608			#size-cells = <0>;
609
610			led@0 {
611				reg = <0>;
612				color = <LED_COLOR_ID_GREEN>;
613				function = LED_FUNCTION_LAN;
614			};
615
616			led@1 {
617				reg = <1>;
618				color = <LED_COLOR_ID_GREEN>;
619				function = LED_FUNCTION_SPEED_LAN;
620			};
621
622			led@2 {
623				reg = <2>;
624				color = <LED_COLOR_ID_YELLOW>;
625				function = LED_FUNCTION_SPEED_LAN;
626			};
627		};
628	};
629};
630
631&mcu_r5fss0 {
632	/* lock-step mode not supported on iot2050 boards */
633	ti,cluster-mode = <0>;
634};
635
636#include "k3-am65-ti-ipc-firmware.dtsi"
637
638&rtos_ipc_memory_region {
639	reg = <0x00 0xa2000000 0x00 0x00200000>;
640};
641