1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Based on arch/arm/mm/fault.c
4 *
5 * Copyright (C) 1995 Linus Torvalds
6 * Copyright (C) 1995-2004 Russell King
7 * Copyright (C) 2012 ARM Ltd.
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/bitfield.h>
12 #include <linux/extable.h>
13 #include <linux/kfence.h>
14 #include <linux/signal.h>
15 #include <linux/mm.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/kasan.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/page-flags.h>
22 #include <linux/sched/signal.h>
23 #include <linux/sched/debug.h>
24 #include <linux/highmem.h>
25 #include <linux/perf_event.h>
26 #include <linux/pkeys.h>
27 #include <linux/preempt.h>
28 #include <linux/hugetlb.h>
29
30 #include <asm/acpi.h>
31 #include <asm/bug.h>
32 #include <asm/cmpxchg.h>
33 #include <asm/cpufeature.h>
34 #include <asm/efi.h>
35 #include <asm/exception.h>
36 #include <asm/daifflags.h>
37 #include <asm/debug-monitors.h>
38 #include <asm/esr.h>
39 #include <asm/kprobes.h>
40 #include <asm/mte.h>
41 #include <asm/processor.h>
42 #include <asm/sysreg.h>
43 #include <asm/system_misc.h>
44 #include <asm/tlbflush.h>
45 #include <asm/traps.h>
46
47 struct fault_info {
48 int (*fn)(unsigned long far, unsigned long esr,
49 struct pt_regs *regs);
50 int sig;
51 int code;
52 const char *name;
53 };
54
55 static const struct fault_info fault_info[];
56
esr_to_fault_info(unsigned long esr)57 static inline const struct fault_info *esr_to_fault_info(unsigned long esr)
58 {
59 return fault_info + (esr & ESR_ELx_FSC);
60 }
61
data_abort_decode(unsigned long esr)62 static void data_abort_decode(unsigned long esr)
63 {
64 unsigned long iss2 = ESR_ELx_ISS2(esr);
65
66 pr_alert("Data abort info:\n");
67
68 if (esr & ESR_ELx_ISV) {
69 pr_alert(" Access size = %u byte(s)\n",
70 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
71 pr_alert(" SSE = %lu, SRT = %lu\n",
72 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
73 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
74 pr_alert(" SF = %lu, AR = %lu\n",
75 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
76 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
77 } else {
78 pr_alert(" ISV = 0, ISS = 0x%08lx, ISS2 = 0x%08lx\n",
79 esr & ESR_ELx_ISS_MASK, iss2);
80 }
81
82 pr_alert(" CM = %lu, WnR = %lu, TnD = %lu, TagAccess = %lu\n",
83 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
84 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT,
85 (iss2 & ESR_ELx_TnD) >> ESR_ELx_TnD_SHIFT,
86 (iss2 & ESR_ELx_TagAccess) >> ESR_ELx_TagAccess_SHIFT);
87
88 pr_alert(" GCS = %ld, Overlay = %lu, DirtyBit = %lu, Xs = %llu\n",
89 (iss2 & ESR_ELx_GCS) >> ESR_ELx_GCS_SHIFT,
90 (iss2 & ESR_ELx_Overlay) >> ESR_ELx_Overlay_SHIFT,
91 (iss2 & ESR_ELx_DirtyBit) >> ESR_ELx_DirtyBit_SHIFT,
92 (iss2 & ESR_ELx_Xs_MASK) >> ESR_ELx_Xs_SHIFT);
93 }
94
mem_abort_decode(unsigned long esr)95 static void mem_abort_decode(unsigned long esr)
96 {
97 pr_alert("Mem abort info:\n");
98
99 pr_alert(" ESR = 0x%016lx\n", esr);
100 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n",
101 ESR_ELx_EC(esr), esr_get_class_string(esr),
102 (esr & ESR_ELx_IL) ? 32 : 16);
103 pr_alert(" SET = %lu, FnV = %lu\n",
104 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
105 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
106 pr_alert(" EA = %lu, S1PTW = %lu\n",
107 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
108 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
109 pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC),
110 esr_to_fault_info(esr)->name);
111
112 if (esr_is_data_abort(esr))
113 data_abort_decode(esr);
114 }
115
mm_to_pgd_phys(struct mm_struct * mm)116 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
117 {
118 /* Either init_pg_dir or swapper_pg_dir */
119 if (mm == &init_mm)
120 return __pa_symbol(mm->pgd);
121
122 return (unsigned long)virt_to_phys(mm->pgd);
123 }
124
125 /*
126 * Dump out the page tables associated with 'addr' in the currently active mm.
127 */
show_pte(unsigned long addr)128 static void show_pte(unsigned long addr)
129 {
130 struct mm_struct *mm;
131 pgd_t *pgdp;
132 pgd_t pgd;
133
134 if (is_ttbr0_addr(addr)) {
135 /* TTBR0 */
136 mm = current->active_mm;
137 if (mm == &init_mm) {
138 pr_alert("[%016lx] user address but active_mm is swapper\n",
139 addr);
140 return;
141 }
142 } else if (is_ttbr1_addr(addr)) {
143 /* TTBR1 */
144 mm = &init_mm;
145 } else {
146 pr_alert("[%016lx] address between user and kernel address ranges\n",
147 addr);
148 return;
149 }
150
151 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
152 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
153 vabits_actual, mm_to_pgd_phys(mm));
154 pgdp = pgd_offset(mm, addr);
155 pgd = READ_ONCE(*pgdp);
156 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
157
158 do {
159 p4d_t *p4dp, p4d;
160 pud_t *pudp, pud;
161 pmd_t *pmdp, pmd;
162 pte_t *ptep, pte;
163
164 if (pgd_none(pgd) || pgd_bad(pgd))
165 break;
166
167 p4dp = p4d_offset(pgdp, addr);
168 p4d = READ_ONCE(*p4dp);
169 pr_cont(", p4d=%016llx", p4d_val(p4d));
170 if (p4d_none(p4d) || p4d_bad(p4d))
171 break;
172
173 pudp = pud_offset(p4dp, addr);
174 pud = READ_ONCE(*pudp);
175 pr_cont(", pud=%016llx", pud_val(pud));
176 if (pud_none(pud) || pud_bad(pud))
177 break;
178
179 pmdp = pmd_offset(pudp, addr);
180 pmd = READ_ONCE(*pmdp);
181 pr_cont(", pmd=%016llx", pmd_val(pmd));
182 if (pmd_none(pmd) || pmd_bad(pmd))
183 break;
184
185 ptep = pte_offset_map(pmdp, addr);
186 if (!ptep)
187 break;
188
189 pte = __ptep_get(ptep);
190 pr_cont(", pte=%016llx", pte_val(pte));
191 pte_unmap(ptep);
192 } while(0);
193
194 pr_cont("\n");
195 }
196
197 /*
198 * This function sets the access flags (dirty, accessed), as well as write
199 * permission, and only to a more permissive setting.
200 *
201 * It needs to cope with hardware update of the accessed/dirty state by other
202 * agents in the system and can safely skip the __sync_icache_dcache() call as,
203 * like __set_ptes(), the PTE is never changed from no-exec to exec here.
204 *
205 * Returns whether or not the PTE actually changed.
206 */
__ptep_set_access_flags(struct vm_area_struct * vma,unsigned long address,pte_t * ptep,pte_t entry,int dirty)207 int __ptep_set_access_flags(struct vm_area_struct *vma,
208 unsigned long address, pte_t *ptep,
209 pte_t entry, int dirty)
210 {
211 pteval_t old_pteval, pteval;
212 pte_t pte = __ptep_get(ptep);
213
214 if (pte_same(pte, entry))
215 return 0;
216
217 /* only preserve the access flags and write permission */
218 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
219
220 /*
221 * Setting the flags must be done atomically to avoid racing with the
222 * hardware update of the access/dirty state. The PTE_RDONLY bit must
223 * be set to the most permissive (lowest value) of *ptep and entry
224 * (calculated as: a & b == ~(~a | ~b)).
225 */
226 pte_val(entry) ^= PTE_RDONLY;
227 pteval = pte_val(pte);
228 do {
229 old_pteval = pteval;
230 pteval ^= PTE_RDONLY;
231 pteval |= pte_val(entry);
232 pteval ^= PTE_RDONLY;
233 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
234 } while (pteval != old_pteval);
235
236 /* Invalidate a stale read-only entry */
237 if (dirty)
238 flush_tlb_page(vma, address);
239 return 1;
240 }
241
is_el1_instruction_abort(unsigned long esr)242 static bool is_el1_instruction_abort(unsigned long esr)
243 {
244 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
245 }
246
is_el1_data_abort(unsigned long esr)247 static bool is_el1_data_abort(unsigned long esr)
248 {
249 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
250 }
251
is_el1_permission_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)252 static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr,
253 struct pt_regs *regs)
254 {
255 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
256 return false;
257
258 if (esr_fsc_is_permission_fault(esr))
259 return true;
260
261 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
262 return esr_fsc_is_translation_fault(esr) &&
263 (regs->pstate & PSR_PAN_BIT);
264
265 return false;
266 }
267
is_spurious_el1_translation_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)268 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
269 unsigned long esr,
270 struct pt_regs *regs)
271 {
272 unsigned long flags;
273 u64 par, dfsc;
274
275 if (!is_el1_data_abort(esr) || !esr_fsc_is_translation_fault(esr))
276 return false;
277
278 local_irq_save(flags);
279 asm volatile("at s1e1r, %0" :: "r" (addr));
280 isb();
281 par = read_sysreg_par();
282 local_irq_restore(flags);
283
284 /*
285 * If we now have a valid translation, treat the translation fault as
286 * spurious.
287 */
288 if (!(par & SYS_PAR_EL1_F))
289 return true;
290
291 /*
292 * If we got a different type of fault from the AT instruction,
293 * treat the translation fault as spurious.
294 */
295 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
296 return !esr_fsc_is_translation_fault(dfsc);
297 }
298
die_kernel_fault(const char * msg,unsigned long addr,unsigned long esr,struct pt_regs * regs)299 static void die_kernel_fault(const char *msg, unsigned long addr,
300 unsigned long esr, struct pt_regs *regs)
301 {
302 bust_spinlocks(1);
303
304 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
305 addr);
306
307 kasan_non_canonical_hook(addr);
308
309 mem_abort_decode(esr);
310
311 show_pte(addr);
312 die("Oops", regs, esr);
313 bust_spinlocks(0);
314 make_task_dead(SIGKILL);
315 }
316
317 #ifdef CONFIG_KASAN_HW_TAGS
report_tag_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)318 static void report_tag_fault(unsigned long addr, unsigned long esr,
319 struct pt_regs *regs)
320 {
321 /*
322 * SAS bits aren't set for all faults reported in EL1, so we can't
323 * find out access size.
324 */
325 bool is_write = !!(esr & ESR_ELx_WNR);
326 kasan_report((void *)addr, 0, is_write, regs->pc);
327 }
328 #else
329 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
report_tag_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)330 static inline void report_tag_fault(unsigned long addr, unsigned long esr,
331 struct pt_regs *regs) { }
332 #endif
333
do_tag_recovery(unsigned long addr,unsigned long esr,struct pt_regs * regs)334 static void do_tag_recovery(unsigned long addr, unsigned long esr,
335 struct pt_regs *regs)
336 {
337
338 report_tag_fault(addr, esr, regs);
339
340 /*
341 * Disable MTE Tag Checking on the local CPU for the current EL.
342 * It will be done lazily on the other CPUs when they will hit a
343 * tag fault.
344 */
345 sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCF_MASK,
346 SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE));
347 isb();
348 }
349
is_el1_mte_sync_tag_check_fault(unsigned long esr)350 static bool is_el1_mte_sync_tag_check_fault(unsigned long esr)
351 {
352 unsigned long fsc = esr & ESR_ELx_FSC;
353
354 if (!is_el1_data_abort(esr))
355 return false;
356
357 if (fsc == ESR_ELx_FSC_MTE)
358 return true;
359
360 return false;
361 }
362
__do_kernel_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)363 static void __do_kernel_fault(unsigned long addr, unsigned long esr,
364 struct pt_regs *regs)
365 {
366 const char *msg;
367
368 /*
369 * Are we prepared to handle this kernel fault?
370 * We are almost certainly not prepared to handle instruction faults.
371 */
372 if (!is_el1_instruction_abort(esr) && fixup_exception(regs, esr))
373 return;
374
375 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
376 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
377 return;
378
379 if (is_el1_mte_sync_tag_check_fault(esr)) {
380 do_tag_recovery(addr, esr, regs);
381
382 return;
383 }
384
385 if (is_el1_permission_fault(addr, esr, regs)) {
386 if (esr & ESR_ELx_WNR)
387 msg = "write to read-only memory";
388 else if (is_el1_instruction_abort(esr))
389 msg = "execute from non-executable memory";
390 else
391 msg = "read from unreadable memory";
392 } else if (addr < PAGE_SIZE) {
393 msg = "NULL pointer dereference";
394 } else {
395 if (esr_fsc_is_translation_fault(esr) &&
396 kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
397 return;
398
399 msg = "paging request";
400 }
401
402 if (efi_runtime_fixup_exception(regs, msg))
403 return;
404
405 die_kernel_fault(msg, addr, esr, regs);
406 }
407
set_thread_esr(unsigned long address,unsigned long esr)408 static void set_thread_esr(unsigned long address, unsigned long esr)
409 {
410 current->thread.fault_address = address;
411
412 /*
413 * If the faulting address is in the kernel, we must sanitize the ESR.
414 * From userspace's point of view, kernel-only mappings don't exist
415 * at all, so we report them as level 0 translation faults.
416 * (This is not quite the way that "no mapping there at all" behaves:
417 * an alignment fault not caused by the memory type would take
418 * precedence over translation fault for a real access to empty
419 * space. Unfortunately we can't easily distinguish "alignment fault
420 * not caused by memory type" from "alignment fault caused by memory
421 * type", so we ignore this wrinkle and just return the translation
422 * fault.)
423 */
424 if (!is_ttbr0_addr(current->thread.fault_address)) {
425 switch (ESR_ELx_EC(esr)) {
426 case ESR_ELx_EC_DABT_LOW:
427 /*
428 * These bits provide only information about the
429 * faulting instruction, which userspace knows already.
430 * We explicitly clear bits which are architecturally
431 * RES0 in case they are given meanings in future.
432 * We always report the ESR as if the fault was taken
433 * to EL1 and so ISV and the bits in ISS[23:14] are
434 * clear. (In fact it always will be a fault to EL1.)
435 */
436 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
437 ESR_ELx_CM | ESR_ELx_WNR;
438 esr |= ESR_ELx_FSC_FAULT;
439 break;
440 case ESR_ELx_EC_IABT_LOW:
441 /*
442 * Claim a level 0 translation fault.
443 * All other bits are architecturally RES0 for faults
444 * reported with that DFSC value, so we clear them.
445 */
446 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
447 esr |= ESR_ELx_FSC_FAULT;
448 break;
449 default:
450 /*
451 * This should never happen (entry.S only brings us
452 * into this code for insn and data aborts from a lower
453 * exception level). Fail safe by not providing an ESR
454 * context record at all.
455 */
456 WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr);
457 esr = 0;
458 break;
459 }
460 }
461
462 current->thread.fault_code = esr;
463 }
464
do_bad_area(unsigned long far,unsigned long esr,struct pt_regs * regs)465 static void do_bad_area(unsigned long far, unsigned long esr,
466 struct pt_regs *regs)
467 {
468 unsigned long addr = untagged_addr(far);
469
470 /*
471 * If we are in kernel mode at this point, we have no context to
472 * handle this fault with.
473 */
474 if (user_mode(regs)) {
475 const struct fault_info *inf = esr_to_fault_info(esr);
476
477 set_thread_esr(addr, esr);
478 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
479 } else {
480 __do_kernel_fault(addr, esr, regs);
481 }
482 }
483
fault_from_pkey(struct vm_area_struct * vma,unsigned int mm_flags)484 static bool fault_from_pkey(struct vm_area_struct *vma, unsigned int mm_flags)
485 {
486 if (!system_supports_poe())
487 return false;
488
489 /*
490 * We do not check whether an Overlay fault has occurred because we
491 * cannot make a decision based solely on its value:
492 *
493 * - If Overlay is set, a fault did occur due to POE, but it may be
494 * spurious in those cases where we update POR_EL0 without ISB (e.g.
495 * on context-switch). We would then need to manually check POR_EL0
496 * against vma_pkey(vma), which is exactly what
497 * arch_vma_access_permitted() does.
498 *
499 * - If Overlay is not set, we may still need to report a pkey fault.
500 * This is the case if an access was made within a mapping but with no
501 * page mapped, and POR_EL0 forbids the access (according to
502 * vma_pkey()). Such access will result in a SIGSEGV regardless
503 * because core code checks arch_vma_access_permitted(), but in order
504 * to report the correct error code - SEGV_PKUERR - we must handle
505 * that case here.
506 */
507 return !arch_vma_access_permitted(vma,
508 mm_flags & FAULT_FLAG_WRITE,
509 mm_flags & FAULT_FLAG_INSTRUCTION,
510 false);
511 }
512
is_gcs_fault(unsigned long esr)513 static bool is_gcs_fault(unsigned long esr)
514 {
515 if (!esr_is_data_abort(esr))
516 return false;
517
518 return ESR_ELx_ISS2(esr) & ESR_ELx_GCS;
519 }
520
is_el0_instruction_abort(unsigned long esr)521 static bool is_el0_instruction_abort(unsigned long esr)
522 {
523 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
524 }
525
526 /*
527 * Note: not valid for EL1 DC IVAC, but we never use that such that it
528 * should fault. EL0 cannot issue DC IVAC (undef).
529 */
is_write_abort(unsigned long esr)530 static bool is_write_abort(unsigned long esr)
531 {
532 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
533 }
534
is_invalid_gcs_access(struct vm_area_struct * vma,u64 esr)535 static bool is_invalid_gcs_access(struct vm_area_struct *vma, u64 esr)
536 {
537 if (!system_supports_gcs())
538 return false;
539
540 if (unlikely(is_gcs_fault(esr))) {
541 /* GCS accesses must be performed on a GCS page */
542 if (!(vma->vm_flags & VM_SHADOW_STACK))
543 return true;
544 } else if (unlikely(vma->vm_flags & VM_SHADOW_STACK)) {
545 /* Only GCS operations can write to a GCS page */
546 return esr_is_data_abort(esr) && is_write_abort(esr);
547 }
548
549 return false;
550 }
551
do_page_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)552 static int __kprobes do_page_fault(unsigned long far, unsigned long esr,
553 struct pt_regs *regs)
554 {
555 const struct fault_info *inf;
556 struct mm_struct *mm = current->mm;
557 vm_fault_t fault;
558 vm_flags_t vm_flags;
559 unsigned int mm_flags = FAULT_FLAG_DEFAULT;
560 unsigned long addr = untagged_addr(far);
561 struct vm_area_struct *vma;
562 int si_code;
563 int pkey = -1;
564
565 if (kprobe_page_fault(regs, esr))
566 return 0;
567
568 /*
569 * If we're in an interrupt or have no user context, we must not take
570 * the fault.
571 */
572 if (faulthandler_disabled() || !mm)
573 goto no_context;
574
575 if (user_mode(regs))
576 mm_flags |= FAULT_FLAG_USER;
577
578 /*
579 * vm_flags tells us what bits we must have in vma->vm_flags
580 * for the fault to be benign, __do_page_fault() would check
581 * vma->vm_flags & vm_flags and returns an error if the
582 * intersection is empty
583 */
584 if (is_el0_instruction_abort(esr)) {
585 /* It was exec fault */
586 vm_flags = VM_EXEC;
587 mm_flags |= FAULT_FLAG_INSTRUCTION;
588 } else if (is_gcs_fault(esr)) {
589 /*
590 * The GCS permission on a page implies both read and
591 * write so always handle any GCS fault as a write fault,
592 * we need to trigger CoW even for GCS reads.
593 */
594 vm_flags = VM_WRITE;
595 mm_flags |= FAULT_FLAG_WRITE;
596 } else if (is_write_abort(esr)) {
597 /* It was write fault */
598 vm_flags = VM_WRITE;
599 mm_flags |= FAULT_FLAG_WRITE;
600 } else {
601 /* It was read fault */
602 vm_flags = VM_READ;
603 /* Write implies read */
604 vm_flags |= VM_WRITE;
605 /* If EPAN is absent then exec implies read */
606 if (!alternative_has_cap_unlikely(ARM64_HAS_EPAN))
607 vm_flags |= VM_EXEC;
608 }
609
610 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
611 if (is_el1_instruction_abort(esr))
612 die_kernel_fault("execution of user memory",
613 addr, esr, regs);
614
615 if (!insn_may_access_user(regs->pc, esr))
616 die_kernel_fault("access to user memory outside uaccess routines",
617 addr, esr, regs);
618 }
619
620 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
621
622 if (!(mm_flags & FAULT_FLAG_USER))
623 goto lock_mmap;
624
625 vma = lock_vma_under_rcu(mm, addr);
626 if (!vma)
627 goto lock_mmap;
628
629 if (is_invalid_gcs_access(vma, esr)) {
630 vma_end_read(vma);
631 fault = 0;
632 si_code = SEGV_ACCERR;
633 goto bad_area;
634 }
635
636 if (!(vma->vm_flags & vm_flags)) {
637 vma_end_read(vma);
638 fault = 0;
639 si_code = SEGV_ACCERR;
640 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
641 goto bad_area;
642 }
643
644 if (fault_from_pkey(vma, mm_flags)) {
645 pkey = vma_pkey(vma);
646 vma_end_read(vma);
647 fault = 0;
648 si_code = SEGV_PKUERR;
649 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
650 goto bad_area;
651 }
652
653 fault = handle_mm_fault(vma, addr, mm_flags | FAULT_FLAG_VMA_LOCK, regs);
654 if (!(fault & (VM_FAULT_RETRY | VM_FAULT_COMPLETED)))
655 vma_end_read(vma);
656
657 if (!(fault & VM_FAULT_RETRY)) {
658 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
659 goto done;
660 }
661 count_vm_vma_lock_event(VMA_LOCK_RETRY);
662 if (fault & VM_FAULT_MAJOR)
663 mm_flags |= FAULT_FLAG_TRIED;
664
665 /* Quick path to respond to signals */
666 if (fault_signal_pending(fault, regs)) {
667 if (!user_mode(regs))
668 goto no_context;
669 return 0;
670 }
671 lock_mmap:
672
673 retry:
674 vma = lock_mm_and_find_vma(mm, addr, regs);
675 if (unlikely(!vma)) {
676 fault = 0;
677 si_code = SEGV_MAPERR;
678 goto bad_area;
679 }
680
681 if (!(vma->vm_flags & vm_flags)) {
682 mmap_read_unlock(mm);
683 fault = 0;
684 si_code = SEGV_ACCERR;
685 goto bad_area;
686 }
687
688 if (fault_from_pkey(vma, mm_flags)) {
689 pkey = vma_pkey(vma);
690 mmap_read_unlock(mm);
691 fault = 0;
692 si_code = SEGV_PKUERR;
693 goto bad_area;
694 }
695
696 fault = handle_mm_fault(vma, addr, mm_flags, regs);
697
698 /* Quick path to respond to signals */
699 if (fault_signal_pending(fault, regs)) {
700 if (!user_mode(regs))
701 goto no_context;
702 return 0;
703 }
704
705 /* The fault is fully completed (including releasing mmap lock) */
706 if (fault & VM_FAULT_COMPLETED)
707 return 0;
708
709 if (fault & VM_FAULT_RETRY) {
710 mm_flags |= FAULT_FLAG_TRIED;
711 goto retry;
712 }
713 mmap_read_unlock(mm);
714
715 done:
716 /* Handle the "normal" (no error) case first. */
717 if (likely(!(fault & VM_FAULT_ERROR)))
718 return 0;
719
720 si_code = SEGV_MAPERR;
721 bad_area:
722 /*
723 * If we are in kernel mode at this point, we have no context to
724 * handle this fault with.
725 */
726 if (!user_mode(regs))
727 goto no_context;
728
729 if (fault & VM_FAULT_OOM) {
730 /*
731 * We ran out of memory, call the OOM killer, and return to
732 * userspace (which will retry the fault, or kill us if we got
733 * oom-killed).
734 */
735 pagefault_out_of_memory();
736 return 0;
737 }
738
739 inf = esr_to_fault_info(esr);
740 set_thread_esr(addr, esr);
741 if (fault & VM_FAULT_SIGBUS) {
742 /*
743 * We had some memory, but were unable to successfully fix up
744 * this page fault.
745 */
746 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
747 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
748 unsigned int lsb;
749
750 lsb = PAGE_SHIFT;
751 if (fault & VM_FAULT_HWPOISON_LARGE)
752 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
753
754 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
755 } else {
756 /*
757 * The pkey value that we return to userspace can be different
758 * from the pkey that caused the fault.
759 *
760 * 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4);
761 * 2. T1 : set POR_EL0 to deny access to pkey=4, touches, page
762 * 3. T1 : faults...
763 * 4. T2: mprotect_key(foo, PAGE_SIZE, pkey=5);
764 * 5. T1 : enters fault handler, takes mmap_lock, etc...
765 * 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really
766 * faulted on a pte with its pkey=4.
767 */
768 /* Something tried to access memory that out of memory map */
769 if (si_code == SEGV_PKUERR)
770 arm64_force_sig_fault_pkey(far, inf->name, pkey);
771 else
772 arm64_force_sig_fault(SIGSEGV, si_code, far, inf->name);
773 }
774
775 return 0;
776
777 no_context:
778 __do_kernel_fault(addr, esr, regs);
779 return 0;
780 }
781
do_translation_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)782 static int __kprobes do_translation_fault(unsigned long far,
783 unsigned long esr,
784 struct pt_regs *regs)
785 {
786 unsigned long addr = untagged_addr(far);
787
788 if (is_ttbr0_addr(addr))
789 return do_page_fault(far, esr, regs);
790
791 do_bad_area(far, esr, regs);
792 return 0;
793 }
794
do_alignment_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)795 static int do_alignment_fault(unsigned long far, unsigned long esr,
796 struct pt_regs *regs)
797 {
798 if (IS_ENABLED(CONFIG_COMPAT_ALIGNMENT_FIXUPS) &&
799 compat_user_mode(regs))
800 return do_compat_alignment_fixup(far, regs);
801 do_bad_area(far, esr, regs);
802 return 0;
803 }
804
do_bad(unsigned long far,unsigned long esr,struct pt_regs * regs)805 static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs)
806 {
807 return 1; /* "fault" */
808 }
809
do_sea(unsigned long far,unsigned long esr,struct pt_regs * regs)810 static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs)
811 {
812 const struct fault_info *inf;
813 unsigned long siaddr;
814
815 inf = esr_to_fault_info(esr);
816
817 if (user_mode(regs) && apei_claim_sea(regs) == 0) {
818 /*
819 * APEI claimed this as a firmware-first notification.
820 * Some processing deferred to task_work before ret_to_user().
821 */
822 return 0;
823 }
824
825 if (esr & ESR_ELx_FnV) {
826 siaddr = 0;
827 } else {
828 /*
829 * The architecture specifies that the tag bits of FAR_EL1 are
830 * UNKNOWN for synchronous external aborts. Mask them out now
831 * so that userspace doesn't see them.
832 */
833 siaddr = untagged_addr(far);
834 }
835 add_taint(TAINT_MACHINE_CHECK, LOCKDEP_STILL_OK);
836 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
837
838 return 0;
839 }
840
do_tag_check_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)841 static int do_tag_check_fault(unsigned long far, unsigned long esr,
842 struct pt_regs *regs)
843 {
844 /*
845 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
846 * for tag check faults. Set them to corresponding bits in the untagged
847 * address if ARM64_MTE_FAR isn't supported.
848 * Otherwise, bits 63:60 of FAR_EL1 are not UNKNOWN.
849 */
850 if (!cpus_have_cap(ARM64_MTE_FAR))
851 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
852
853 do_bad_area(far, esr, regs);
854 return 0;
855 }
856
857 static const struct fault_info fault_info[] = {
858 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" },
859 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" },
860 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" },
861 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" },
862 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
863 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
864 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
865 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
866 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 0 access flag fault" },
867 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
868 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
869 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
870 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 0 permission fault" },
871 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
872 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
873 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
874 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" },
875 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" },
876 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" },
877 { do_sea, SIGKILL, SI_KERNEL, "level -1 (translation table walk)" },
878 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" },
879 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" },
880 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" },
881 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" },
882 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented
883 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" },
884 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" },
885 { do_sea, SIGKILL, SI_KERNEL, "level -1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
886 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
887 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
888 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
889 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
890 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" },
891 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
892 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" },
893 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" },
894 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" },
895 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" },
896 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" },
897 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" },
898 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" },
899 { do_bad, SIGKILL, SI_KERNEL, "level -1 address size fault" },
900 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" },
901 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level -1 translation fault" },
902 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" },
903 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" },
904 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" },
905 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" },
906 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" },
907 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" },
908 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" },
909 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" },
910 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" },
911 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" },
912 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" },
913 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" },
914 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" },
915 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" },
916 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" },
917 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" },
918 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" },
919 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" },
920 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" },
921 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" },
922 };
923
do_mem_abort(unsigned long far,unsigned long esr,struct pt_regs * regs)924 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs)
925 {
926 const struct fault_info *inf = esr_to_fault_info(esr);
927 unsigned long addr = untagged_addr(far);
928
929 if (!inf->fn(far, esr, regs))
930 return;
931
932 if (!user_mode(regs))
933 die_kernel_fault(inf->name, addr, esr, regs);
934
935 /*
936 * At this point we have an unrecognized fault type whose tag bits may
937 * have been defined as UNKNOWN. Therefore we only expose the untagged
938 * address to the signal handler.
939 */
940 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
941 }
942 NOKPROBE_SYMBOL(do_mem_abort);
943
do_sp_pc_abort(unsigned long addr,unsigned long esr,struct pt_regs * regs)944 void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs)
945 {
946 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
947 addr, esr);
948 }
949 NOKPROBE_SYMBOL(do_sp_pc_abort);
950
951 /*
952 * Used during anonymous page fault handling.
953 */
vma_alloc_zeroed_movable_folio(struct vm_area_struct * vma,unsigned long vaddr)954 struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,
955 unsigned long vaddr)
956 {
957 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO;
958
959 /*
960 * If the page is mapped with PROT_MTE, initialise the tags at the
961 * point of allocation and page zeroing as this is usually faster than
962 * separate DC ZVA and STGM.
963 */
964 if (vma->vm_flags & VM_MTE)
965 flags |= __GFP_ZEROTAGS;
966
967 return vma_alloc_folio(flags, 0, vma, vaddr);
968 }
969
tag_clear_highpage(struct page * page)970 void tag_clear_highpage(struct page *page)
971 {
972 /* Newly allocated page, shouldn't have been tagged yet */
973 WARN_ON_ONCE(!try_page_mte_tagging(page));
974 mte_zero_clear_page_tags(page_address(page));
975 set_page_mte_tagged(page);
976 }
977