| /linux/tools/perf/util/ |
| H A D | cacheline.c | 6 #define cache_line_size(cacheline_sizep) *cacheline_sizep = sysconf(_SC_LEVEL1_DCACHE_LINESIZE) macro
10 static void cache_line_size(int *cacheline_sizep) in cache_line_size() function
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| /linux/arch/arm64/kernel/ |
| H A D | cacheinfo.c | 15 int cache_line_size(void) in cache_line_size() function
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| /linux/include/linux/ |
| H A D | cache.h | 104 #define cache_line_size() L1_CACHE_BYTES macro
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| H A D | pci-epf.h | 52 u8 cache_line_size; member
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| /linux/arch/um/include/asm/ |
| H A D | processor-generic.h | 86 #define cache_line_size() (boot_cpu_data.cache_alignment) macro
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| /linux/arch/arm/kernel/ |
| H A D | cacheinfo.c | 51 int cache_line_size(void) in cache_line_size() function
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| /linux/arch/arc/include/asm/ |
| H A D | cache.h | 51 #define cache_line_size() SMP_CACHE_BYTES macro
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| /linux/tools/virtio/ringtest/ |
| H A D | ptr_ring.c | 14 #define cache_line_size() SMP_CACHE_BYTES macro
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| /linux/arch/mips/mm/ |
| H A D | page.c | 87 static int cache_line_size; variable
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| /linux/tools/testing/selftests/vDSO/ |
| H A D | vdso_test_getrandom.c | 65 size_t state_size_aligned, cache_line_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE) ?: 1; in vgetrandom_get_state() local
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| /linux/drivers/staging/vc04_services/interface/vchiq_arm/ |
| H A D | vchiq_arm.h | 34 unsigned int cache_line_size; member
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| H A D | vchiq_core.c | 1507 unsigned int cache_line_size; in create_pagelist() local
1693 unsigned int cache_line_size; in free_pagelist() local
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_crat.h | 168 uint16_t cache_line_size; member
304 uint32_t cache_line_size; member
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| /linux/drivers/pci/ |
| H A D | pci-bridge-emul.h | 14 u8 cache_line_size; member
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| H A D | pci-acpi.c | 148 u8 cache_line_size; /* Not applicable to PCIe */ member
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| /linux/drivers/edac/ |
| H A D | i7core_edac.c | 1983 const int cache_line_size = 64; in set_sdram_scrub_rate() local
2023 const u32 cache_line_size = 64; in get_sdram_scrub_rate() local
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| /linux/arch/x86/include/asm/ |
| H A D | processor.h | 220 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
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| /linux/include/uapi/rdma/ |
| H A D | mlx5-abi.h | 139 __u32 cache_line_size; member
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| /linux/drivers/net/ethernet/qlogic/qed/ |
| H A D | qed_dev.c | 2582 u32 val, wr_mbs, cache_line_size; in qed_init_cache_line_size() local
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| /linux/drivers/net/ethernet/chelsio/cxgb4/ |
| H A D | t4_hw.c | 7273 unsigned int cache_line_size) in t4_fixup_host_params()
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| /linux/drivers/scsi/ |
| H A D | ipr.h | 1342 u8 cache_line_size; member
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| /linux/drivers/accel/habanalabs/common/ |
| H A D | habanalabs.h | 800 u16 cache_line_size; member
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