1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2023 Thomas McKahan 5 * Copyright (c) 2024 Sebastian Kropatsch 6 * 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13#include <dt-bindings/pinctrl/rockchip.h> 14#include <dt-bindings/soc/rockchip,vop2.h> 15#include <dt-bindings/usb/pd.h> 16#include "rk3588-friendlyelec-cm3588.dtsi" 17 18/ { 19 model = "FriendlyElec CM3588 NAS"; 20 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588"; 21 22 adc_key_recovery: adc-key-recovery { 23 compatible = "adc-keys"; 24 io-channels = <&saradc 1>; 25 io-channel-names = "buttons"; 26 keyup-threshold-microvolt = <1800000>; 27 poll-interval = <100>; 28 29 button-recovery { 30 label = "Recovery"; 31 linux,code = <KEY_VENDOR>; 32 press-threshold-microvolt = <17000>; 33 }; 34 }; 35 36 analog-sound { 37 compatible = "simple-audio-card"; 38 pinctrl-names = "default"; 39 pinctrl-0 = <&headphone_detect>; 40 41 simple-audio-card,format = "i2s"; 42 simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; 43 simple-audio-card,mclk-fs = <256>; 44 simple-audio-card,name = "realtek,rt5616-codec"; 45 46 simple-audio-card,routing = 47 "Headphones", "HPOL", 48 "Headphones", "HPOR", 49 "MIC1", "Microphone Jack", 50 "Microphone Jack", "micbias1"; 51 simple-audio-card,widgets = 52 "Headphone", "Headphones", 53 "Microphone", "Microphone Jack"; 54 55 simple-audio-card,cpu { 56 sound-dai = <&i2s0_8ch>; 57 }; 58 59 simple-audio-card,codec { 60 sound-dai = <&rt5616>; 61 }; 62 }; 63 64 buzzer: pwm-beeper { 65 compatible = "pwm-beeper"; 66 amp-supply = <&vcc_5v0_sys>; 67 beeper-hz = <500>; 68 pwms = <&pwm8 0 500000 0>; 69 }; 70 71 fan: pwm-fan { 72 compatible = "pwm-fan"; 73 #cooling-cells = <2>; 74 cooling-levels = <0 50 80 120 160 220>; 75 fan-supply = <&vcc_5v0_sys>; 76 pwms = <&pwm1 0 50000 0>; 77 }; 78 79 gpio_keys: gpio-keys { 80 compatible = "gpio-keys"; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&key1_pin>; 83 84 button-user { 85 debounce-interval = <50>; 86 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; 87 label = "User Button"; 88 linux,code = <BTN_1>; 89 wakeup-source; 90 }; 91 }; 92 93 hdmi0-con { 94 compatible = "hdmi-connector"; 95 type = "a"; 96 97 port { 98 hdmi0_con_in: endpoint { 99 remote-endpoint = <&hdmi0_out_con>; 100 }; 101 }; 102 }; 103 104 hdmi1-con { 105 compatible = "hdmi-connector"; 106 type = "a"; 107 108 port { 109 hdmi1_con_in: endpoint { 110 remote-endpoint = <&hdmi1_out_con>; 111 }; 112 }; 113 }; 114 115 ir-receiver { 116 compatible = "gpio-ir-receiver"; 117 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>; 118 }; 119 120 vcc_12v_dcin: regulator-vcc-12v-dcin { 121 compatible = "regulator-fixed"; 122 regulator-name = "vcc_12v_dcin"; 123 regulator-always-on; 124 regulator-boot-on; 125 regulator-min-microvolt = <12000000>; 126 regulator-max-microvolt = <12000000>; 127 }; 128 129 vcc_3v3_m2_a: regulator-vcc-3v3-m2-a { 130 compatible = "regulator-fixed"; 131 regulator-name = "vcc_3v3_m2_a"; 132 regulator-always-on; 133 regulator-boot-on; 134 regulator-min-microvolt = <3300000>; 135 regulator-max-microvolt = <3300000>; 136 vin-supply = <&vcc_12v_dcin>; 137 }; 138 139 vcc_3v3_m2_b: regulator-vcc-3v3-m2-b { 140 compatible = "regulator-fixed"; 141 regulator-name = "vcc_3v3_m2_b"; 142 regulator-always-on; 143 regulator-boot-on; 144 regulator-min-microvolt = <3300000>; 145 regulator-max-microvolt = <3300000>; 146 vin-supply = <&vcc_12v_dcin>; 147 }; 148 149 vcc_3v3_m2_c: regulator-vcc-3v3-m2-c { 150 compatible = "regulator-fixed"; 151 regulator-name = "vcc_3v3_m2_c"; 152 regulator-always-on; 153 regulator-boot-on; 154 regulator-min-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>; 156 vin-supply = <&vcc_12v_dcin>; 157 }; 158 159 vcc_3v3_m2_d: regulator-vcc-3v3-m2-d { 160 compatible = "regulator-fixed"; 161 regulator-name = "vcc_3v3_m2_d"; 162 regulator-always-on; 163 regulator-boot-on; 164 regulator-min-microvolt = <3300000>; 165 regulator-max-microvolt = <3300000>; 166 vin-supply = <&vcc_12v_dcin>; 167 }; 168 169 /* vcc_5v0_sys powers the peripherals */ 170 vcc_5v0_sys: regulator-vcc-5v0-sys { 171 compatible = "regulator-fixed"; 172 regulator-name = "vcc_5v0_sys"; 173 regulator-always-on; 174 regulator-boot-on; 175 regulator-min-microvolt = <5000000>; 176 regulator-max-microvolt = <5000000>; 177 vin-supply = <&vcc_12v_dcin>; 178 }; 179 180 /* SY6280AAC power switch (U14 in schematics) */ 181 vcc_5v0_host_20: regulator-vcc-5v0-host-20 { 182 compatible = "regulator-fixed"; 183 enable-active-high; 184 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&vcc_5v0_host20_en>; 187 regulator-name = "vcc_5v0_host_20"; 188 regulator-min-microvolt = <5000000>; 189 regulator-max-microvolt = <5000000>; 190 vin-supply = <&vcc_5v0_sys>; 191 }; 192 193 /* SY6280AAC power switch (U8 in schematics) */ 194 vcc_5v0_host_30_p1: regulator-vcc-5v0-host-30-p1 { 195 compatible = "regulator-fixed"; 196 enable-active-high; 197 gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 198 pinctrl-names = "default"; 199 pinctrl-0 = <&vcc_5v0_host30p1_en>; 200 regulator-name = "vcc_5v0_host_30_p1"; 201 regulator-min-microvolt = <5000000>; 202 regulator-max-microvolt = <5000000>; 203 vin-supply = <&vcc_5v0_sys>; 204 }; 205 206 /* SY6280AAC power switch (U9 in schematics) */ 207 vcc_5v0_host_30_p2: regulator-vcc-5v0-host-30-p2 { 208 compatible = "regulator-fixed"; 209 enable-active-high; 210 gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&vcc_5v0_host30p2_en>; 213 regulator-name = "vcc_5v0_host_30_p2"; 214 regulator-min-microvolt = <5000000>; 215 regulator-max-microvolt = <5000000>; 216 vin-supply = <&vcc_5v0_sys>; 217 }; 218 219 /* SY6280AAC power switch (U10 in schematics) */ 220 vbus_5v0_typec: regulator-vbus-5v0-typec { 221 compatible = "regulator-fixed"; 222 enable-active-high; 223 gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 224 pinctrl-names = "default"; 225 pinctrl-0 = <&typec_5v_pwr_en>; 226 regulator-name = "vbus_5v0_typec"; 227 regulator-min-microvolt = <5000000>; 228 regulator-max-microvolt = <5000000>; 229 vin-supply = <&vcc_5v0_sys>; 230 }; 231}; 232 233/* vcc_4v0_sys powers the RK806 and RK860's */ 234&vcc_4v0_sys { 235 vin-supply = <&vcc_12v_dcin>; 236}; 237 238/* Combo PHY 1 is configured to act as as PCIe 2.0 PHY */ 239/* Used by PCIe controller 2 (pcie2x1l0) */ 240&combphy1_ps { 241 status = "okay"; 242}; 243 244/* Combo PHY 2 is configured to act as USB3 PHY */ 245/* Used by USB 3.0 OTG 2 controller (USB 3.0 Type-A port 2) */ 246/* CM3588 USB Controller Config Table: USB30 HOST2 */ 247&combphy2_psu { 248 status = "okay"; 249}; 250 251/* GPIO names are in the format "Human-readable-name [SIGNAL_LABEL]" */ 252/* Signal labels match the official CM3588 NAS SDK schematic revision 2309 */ 253&gpio0 { 254 gpio-line-names = 255 /* GPIO0 A0-A7 */ 256 "", "", "", "", 257 "MicroSD detect [SDMMC_DET_L]", "", "", "", 258 /* GPIO0 B0-B7 */ 259 "", "", "", "", 260 "", "", "", "", 261 /* GPIO0 C0-C7 */ 262 "", "", "", "", 263 "Pin 10 [UART0_RX_M0]", "Pin 08 [UART0_TX_M0/PWM4_M0]", "Pin 32 [PWM5_M1]", "", 264 /* GPIO0 D0-D7 */ 265 "", "", "", "USB3 Type-C [CC_INT_L]", 266 "IR receiver [PWM3_IR_M0]", "User Button", "", ""; 267}; 268 269&gpio1 { 270 gpio-line-names = 271 /* GPIO1 A0-A7 */ 272 "Pin 27 [UART6_RX_M1]", "Pin 28 [UART6_TX_M1]", "", "", 273 "USB2 Type-A [USB2_PWREN]", "", "", "Pin 15", 274 /* GPIO1 B0-B7 */ 275 "Pin 26", "Pin 21 [SPI0_MISO_M2]", "Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]", "Pin 23 [SPI0_CLK_M2/UART4_TX_M2]", 276 "Pin 24 [SPI0_CS0_M2/UART7_RX_M2]", "Pin 22 [SPI0_CS1_M0/UART7_TX_M2]", "", "CSI-Pin 14 [MIPI_CAM2_CLKOUT]", 277 /* GPIO1 C0-C7 */ 278 "", "", "", "", 279 "Headphone detect [HP_DET_L]", "", "", "", 280 /* GPIO1 D0-D7 */ 281 "", "", "USB3 Type-C [TYPEC5V_PWREN_H]", "5V Fan [PWM1_M1]", 282 "", "HDMI-in detect [HDMIIRX_DET_L]", "Pin 05 [I2C8_SCL_M2]", "Pin 03 [I2C8_SDA_M2]"; 283}; 284 285&gpio2 { 286 gpio-line-names = 287 /* GPIO2 A0-A7 */ 288 "", "", "", "", 289 "", "", "SPI NOR Flash [FSPI_D0_M1]", "SPI NOR Flash [FSPI_D1_M1]", 290 /* GPIO2 B0-B7 */ 291 "SPI NOR Flash [FSPI_D2_M1]", "SPI NOR Flash [FSPI_D3_M1]", "", "SPI NOR Flash [FSPI_CLK_M1]", 292 "SPI NOR Flash [FSPI_CSN0_M1]", "", "", "", 293 /* GPIO2 C0-C7 */ 294 "", "CSI-Pin 11 [MIPI_CAM2_RESET_L]", "CSI-Pin 12 [MIPI_CAM2_PDN_L]", "", 295 "", "", "", "", 296 /* GPIO2 D0-D7 */ 297 "", "", "", "", 298 "", "", "", ""; 299}; 300 301&gpio3 { 302 gpio-line-names = 303 /* GPIO3 A0-A7 */ 304 "Pin 35 [SPI4_MISO_M1/PWM10_M0]", "Pin 38 [SPI4_MOSI_M1]", "Pin 40 [SPI4_CLK_M1/UART8_TX_M1]", "Pin 36 [SPI4_CS0_M1/UART8_RX_M1]", 305 "Pin 37 [SPI4_CS1_M1]", "USB3-A #2 [USB3_2_PWREN]", "DSI-Pin 12 [LCD_RST]", "Buzzer [PWM8_M0]", 306 /* GPIO3 B0-B7 */ 307 "Pin 33 [PWM9_M0]", "DSI-Pin 10 [PWM2_M1/LCD_BL]", "Pin 07", "Pin 16", 308 "Pin 18", "Pin 29 [UART3_TX_M1/PWM12_M0]", "Pin 31 [UART3_RX_M1/PWM13_M0]", "Pin 12", 309 /* GPIO3 C0-C7 */ 310 "DSI-Pin 08 [TP_INT_L]", "DSI-Pin 14 [TP_RST_L]", "Pin 11 [PWM14_M0]", "Pin 13 [PWM15_IR_M0]", 311 "", "", "", "DSI-Pin 06 [I2C5_SCL_M0_TP]", 312 /* GPIO3 D0-D7 */ 313 "DSI-Pin 05 [I2C5_SDA_M0_TP]", "", "", "", 314 "", "", "", ""; 315}; 316 317&gpio4 { 318 gpio-line-names = 319 /* GPIO4 A0-A7 */ 320 "", "", "M.2 M-Key Slot4 [M2_D_PERST_L]", "", 321 "", "", "", "", 322 /* GPIO4 B0-B7 */ 323 "USB3-A #1 [USB3_TYPEC1_PWREN]", "", "", "M.2 M-Key Slot3 [M2_C_PERST_L]", 324 "M.2 M-Key Slot2 [M2_B_PERST_L]", "M.2 M-Key Slot1 [M2_A_CLKREQ_L]", "M.2 M-Key Slot1 [M2_A_PERST_L]", "", 325 /* GPIO4 C0-C7 */ 326 "", "", "", "", 327 "", "", "", "", 328 /* GPIO4 D0-D7 */ 329 "", "", "", "", 330 "", "", "", ""; 331}; 332 333&hdmi0 { 334 status = "okay"; 335}; 336 337&hdmi0_in { 338 hdmi0_in_vp0: endpoint { 339 remote-endpoint = <&vp0_out_hdmi0>; 340 }; 341}; 342 343&hdmi0_out { 344 hdmi0_out_con: endpoint { 345 remote-endpoint = <&hdmi0_con_in>; 346 }; 347}; 348 349&hdmi1 { 350 status = "okay"; 351}; 352 353&hdmi1_in { 354 hdmi1_in_vp1: endpoint { 355 remote-endpoint = <&vp1_out_hdmi1>; 356 }; 357}; 358 359&hdmi1_out { 360 hdmi1_out_con: endpoint { 361 remote-endpoint = <&hdmi1_con_in>; 362 }; 363}; 364 365&hdmi_receiver_cma { 366 status = "okay"; 367}; 368 369&hdmi_receiver { 370 hpd-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; 371 pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; 372 pinctrl-names = "default"; 373 status = "okay"; 374}; 375 376&hdptxphy0 { 377 status = "okay"; 378}; 379 380&hdptxphy1 { 381 status = "okay"; 382}; 383 384/* Connected to MIPI-DSI0 */ 385&i2c5 { 386 pinctrl-names = "default"; 387 pinctrl-0 = <&i2c5m0_xfer>; 388 status = "disabled"; 389}; 390 391&i2c6 { 392 fusb302: typec-portc@22 { 393 compatible = "fcs,fusb302"; 394 reg = <0x22>; 395 interrupt-parent = <&gpio0>; 396 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 397 pinctrl-names = "default"; 398 pinctrl-0 = <&usbc0_int>; 399 vbus-supply = <&vbus_5v0_typec>; 400 401 usb_con: connector { 402 compatible = "usb-c-connector"; 403 data-role = "dual"; 404 label = "USB-C"; 405 power-role = "source"; 406 source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; 407 try-power-role = "source"; 408 vbus-supply = <&vbus_5v0_typec>; 409 410 ports { 411 #address-cells = <1>; 412 #size-cells = <0>; 413 414 port@0 { 415 reg = <0>; 416 417 usbc0_orien_sw: endpoint { 418 remote-endpoint = <&usbdp_phy0_orientation_switch>; 419 }; 420 }; 421 422 port@1 { 423 reg = <1>; 424 425 usbc0_role_sw: endpoint { 426 remote-endpoint = <&dwc3_0_role_switch>; 427 }; 428 }; 429 430 port@2 { 431 reg = <2>; 432 433 dp_altmode_mux: endpoint { 434 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 435 }; 436 }; 437 }; 438 }; 439 }; 440}; 441 442/* Connected to MIPI-CSI1 */ 443/* &i2c7 */ 444 445/* GPIO Connector, connected to 40-pin GPIO header */ 446&i2c8 { 447 pinctrl-names = "default"; 448 pinctrl-0 = <&i2c8m2_xfer>; 449 status = "okay"; 450}; 451 452&pcie2x1l0 { 453 /* 2. M.2 socket, CON14: pcie30phy port0 lane1, @fe170000 */ 454 max-link-speed = <3>; 455 num-lanes = <1>; 456 phys = <&pcie30phy>; 457 pinctrl-names = "default"; 458 pinctrl-0 = <&pcie2_0_rst>; 459 reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; 460 vpcie3v3-supply = <&vcc_3v3_m2_b>; 461 status = "okay"; 462}; 463 464&pcie2x1l1 { 465 /* 4. M.2 socket, CON16: pcie30phy port1 lane1, @fe180000 */ 466 max-link-speed = <3>; 467 num-lanes = <1>; 468 phys = <&pcie30phy>; 469 pinctrl-names = "default"; 470 pinctrl-0 = <&pcie2_1_rst>; 471 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 472 vpcie3v3-supply = <&vcc_3v3_m2_d>; 473 status = "okay"; 474}; 475 476&pcie30phy { 477 /* 478 * Data lane mapping <1 3 2 4> = x1x1 x1x1 (bifurcation of both ports) 479 * port 0 lane 0 - always mapped to controller 0 (4L) 480 * port 0 lane 1 - map to controller 2 (1L0) 481 * port 1 lane 0 - map to controller 1 (2L) 482 * port 1 lane 1 - map to controller 3 (1L1) 483 */ 484 data-lanes = <1 3 2 4>; 485 status = "okay"; 486}; 487 488&pcie3x4 { 489 /* 1. M.2 socket, CON13: pcie30phy port0 lane0, @fe150000 */ 490 max-link-speed = <3>; 491 num-lanes = <1>; 492 pinctrl-names = "default"; 493 pinctrl-0 = <&pcie3x4_rst>; 494 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 495 vpcie3v3-supply = <&vcc_3v3_m2_a>; 496 status = "okay"; 497}; 498 499&pcie3x2 { 500 /* 3. M.2 socket, CON15: pcie30phy port1 lane0, @fe160000 */ 501 max-link-speed = <3>; 502 num-lanes = <1>; 503 pinctrl-names = "default"; 504 pinctrl-0 = <&pcie3x2_rst>; 505 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; 506 vpcie3v3-supply = <&vcc_3v3_m2_c>; 507 status = "okay"; 508}; 509 510&pinctrl { 511 audio { 512 headphone_detect: headphone-detect { 513 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 514 }; 515 }; 516 517 gpio-key { 518 key1_pin: key1-pin { 519 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; 520 }; 521 }; 522 523 hdmirx { 524 hdmirx_hpd: hdmirx-5v-detection { 525 rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 526 }; 527 }; 528 529 pcie { 530 pcie2_0_rst: pcie2-0-rst { 531 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 532 }; 533 534 pcie2_1_rst: pcie2-1-rst { 535 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 536 }; 537 538 pcie3x2_rst: pcie3x2-rst { 539 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 540 }; 541 542 pcie3x4_rst: pcie3x4-rst { 543 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 544 }; 545 }; 546 547 usb { 548 vcc_5v0_host20_en: vcc-5v0-host20-en { 549 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 550 }; 551 552 vcc_5v0_host30p1_en: vcc-5v0-host30p1-en { 553 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 554 }; 555 556 vcc_5v0_host30p2_en: vcc-5v0-host30p2-en { 557 rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 558 }; 559 }; 560 561 usb-typec { 562 usbc0_int: usbc0-int { 563 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 564 }; 565 566 typec_5v_pwr_en: typec-5v-pwr-en { 567 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 568 }; 569 }; 570}; 571 572/* Connected to 5V Fan */ 573&pwm1 { 574 pinctrl-names = "default"; 575 pinctrl-0 = <&pwm1m1_pins>; 576 status = "okay"; 577}; 578 579/* Connected to MIPI-DSI0 */ 580&pwm2 { 581 pinctrl-names = "default"; 582 pinctrl-0 = <&pwm2m1_pins>; 583}; 584 585/* Connected to IR Receiver */ 586&pwm3 { 587 pinctrl-names = "default"; 588 pinctrl-0 = <&pwm3m0_pins>; 589 status = "okay"; 590}; 591 592/* GPIO Connector, connected to 40-pin GPIO header */ 593/* Shared with UART0 */ 594&pwm4 { 595 pinctrl-names = "default"; 596 pinctrl-0 = <&pwm4m1_pins>; 597 status = "disabled"; 598}; 599 600/* GPIO Connector, connected to 40-pin GPIO header */ 601&pwm5 { 602 pinctrl-names = "default"; 603 pinctrl-0 = <&pwm5m1_pins>; 604 status = "okay"; 605}; 606 607/* Connected to Buzzer */ 608&pwm8 { 609 pinctrl-names = "default"; 610 pinctrl-0 = <&pwm8m0_pins>; 611 status = "okay"; 612}; 613 614/* GPIO Connector, connected to 40-pin GPIO header */ 615&pwm9 { 616 pinctrl-names = "default"; 617 pinctrl-0 = <&pwm9m0_pins>; 618 status = "okay"; 619}; 620 621/* GPIO Connector, connected to 40-pin GPIO header */ 622/* Shared with SPI4 */ 623&pwm10 { 624 pinctrl-names = "default"; 625 pinctrl-0 = <&pwm10m0_pins>; 626 status = "disabled"; 627}; 628 629/* GPIO Connector, connected to 40-pin GPIO header */ 630/* Shared with UART3 */ 631&pwm12 { 632 pinctrl-names = "default"; 633 pinctrl-0 = <&pwm12m0_pins>; 634 status = "disabled"; 635}; 636 637/* GPIO Connector, connected to 40-pin GPIO header */ 638/* Shared with UART3 */ 639&pwm13 { 640 pinctrl-names = "default"; 641 pinctrl-0 = <&pwm13m0_pins>; 642 status = "disabled"; 643}; 644 645/* GPIO Connector, connected to 40-pin GPIO header */ 646&pwm14 { 647 pinctrl-names = "default"; 648 pinctrl-0 = <&pwm14m0_pins>; 649 status = "okay"; 650}; 651 652/* GPIO Connector, connected to 40-pin GPIO header */ 653/* Optimized for infrared applications */ 654&pwm15 { 655 pinctrl-names = "default"; 656 pinctrl-0 = <&pwm15m0_pins>; 657 status = "disabled"; 658}; 659 660/* microSD card */ 661&sdmmc { 662 status = "okay"; 663}; 664 665/* GPIO Connector, connected to 40-pin GPIO header */ 666/* Shared with UART4, UART7 and PWM10 */ 667&spi0 { 668 num-cs = <1>; 669 pinctrl-names = "default"; 670 pinctrl-0 = <&spi0m2_cs0 &spi0m2_pins>; 671 status = "disabled"; 672}; 673 674/* GPIO Connector, connected to 40-pin GPIO header */ 675/* Shared with UART8 */ 676&spi4 { 677 num-cs = <1>; 678 pinctrl-names = "default"; 679 pinctrl-0 = <&spi4m1_cs0 &spi4m1_pins>; 680 status = "disabled"; 681}; 682 683/* GPIO Connector, connected to 40-pin GPIO header */ 684/* Shared with PWM4 */ 685&uart0 { 686 pinctrl-names = "default"; 687 pinctrl-0 = <&uart0m0_xfer>; 688 status = "disabled"; 689}; 690 691/* Debug UART */ 692&uart2 { 693 status = "okay"; 694}; 695 696/* GPIO Connector, connected to 40-pin GPIO header */ 697/* Shared with PWM12 and PWM13 */ 698&uart3 { 699 pinctrl-names = "default"; 700 pinctrl-0 = <&uart3m1_xfer>; 701 status = "disabled"; 702}; 703 704/* GPIO Connector, connected to 40-pin GPIO header */ 705/* Shared with SPI0 */ 706&uart4 { 707 pinctrl-names = "default"; 708 pinctrl-0 = <&uart4m2_xfer>; 709 status = "disabled"; 710}; 711 712/* GPIO Connector, connected to 40-pin GPIO header */ 713&uart6 { 714 pinctrl-names = "default"; 715 pinctrl-0 = <&uart6m1_xfer>; 716 status = "okay"; 717}; 718 719/* GPIO Connector, connected to 40-pin GPIO header */ 720/* Shared with SPI0 */ 721&uart7 { 722 pinctrl-names = "default"; 723 pinctrl-0 = <&uart7m2_xfer>; 724 status = "disabled"; 725}; 726 727/* GPIO Connector, connected to 40-pin GPIO header */ 728/* Shared with SPI4 */ 729&uart8 { 730 pinctrl-names = "default"; 731 pinctrl-0 = <&uart8m1_xfer>; 732 status = "disabled"; 733}; 734 735/* USB2 PHY for USB Type-C port */ 736/* CM3588 USB Controller Config Table: USB20 OTG0 */ 737&u2phy0 { 738 status = "okay"; 739}; 740 741&u2phy0_otg { 742 phy-supply = <&vbus_5v0_typec>; 743 status = "okay"; 744}; 745 746/* USB2 PHY for USB 3.0 Type-A port 1 */ 747/* CM3588 USB Controller Config Table: USB20 OTG1 */ 748&u2phy1 { 749 status = "okay"; 750}; 751 752&u2phy1_otg { 753 phy-supply = <&vcc_5v0_host_30_p1>; 754 status = "okay"; 755}; 756 757/* USB2 PHY for USB 2.0 Type-A */ 758/* CM3588 USB Controller Config Table: USB20 HOST0 */ 759&u2phy2 { 760 status = "okay"; 761}; 762 763&u2phy2_host { 764 phy-supply = <&vcc_5v0_host_20>; 765 status = "okay"; 766}; 767 768/* USB2 PHY for USB 3.0 Type-A port 2 */ 769/* CM3588 USB Controller Config Table: USB20 HOST1 */ 770&u2phy3 { 771 status = "okay"; 772}; 773 774&u2phy3_host { 775 phy-supply = <&vcc_5v0_host_30_p2>; 776 status = "okay"; 777}; 778 779/* USB 2.0 Type-A */ 780/* PHY: <&u2phy2_host> */ 781&usb_host0_ehci { 782 status = "okay"; 783}; 784 785/* USB 2.0 Type-A */ 786/* PHY: <&u2phy2_host> */ 787&usb_host0_ohci { 788 status = "okay"; 789}; 790 791/* USB Type-C */ 792/* PHYs: <&u2phy0_otg>, <&usbdp_phy0 PHY_TYPE_USB3> */ 793&usb_host0_xhci { 794 usb-role-switch; 795 status = "okay"; 796 797 port { 798 dwc3_0_role_switch: endpoint { 799 remote-endpoint = <&usbc0_role_sw>; 800 }; 801 }; 802}; 803 804/* Lower USB 3.0 Type-A (port 2) */ 805/* PHY: <&u2phy3_host> */ 806&usb_host1_ehci { 807 status = "okay"; 808}; 809 810/* Lower USB 3.0 Type-A (port 2) */ 811/* PHY: <&u2phy3_host> */ 812&usb_host1_ohci { 813 status = "okay"; 814}; 815 816/* Upper USB 3.0 Type-A (port 1) */ 817/* PHYs: <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3> */ 818&usb_host1_xhci { 819 dr_mode = "host"; 820 status = "okay"; 821}; 822 823/* Lower USB 3.0 Type-A (port 2) */ 824/* PHYs: <&combphy2_psu PHY_TYPE_USB3> */ 825&usb_host2_xhci { 826 status = "okay"; 827}; 828 829/* USB3 PHY for USB Type-C port */ 830/* CM3588 USB Controller Config Table: USB30 OTG0 */ 831&usbdp_phy0 { 832 mode-switch; 833 orientation-switch; 834 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; 835 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 836 status = "okay"; 837 838 port { 839 #address-cells = <1>; 840 #size-cells = <0>; 841 842 usbdp_phy0_orientation_switch: endpoint@0 { 843 reg = <0>; 844 remote-endpoint = <&usbc0_orien_sw>; 845 }; 846 847 usbdp_phy0_dp_altmode_mux: endpoint@1 { 848 reg = <1>; 849 remote-endpoint = <&dp_altmode_mux>; 850 }; 851 }; 852}; 853 854/* USB3 PHY for USB 3.0 Type-A port 1 */ 855/* CM3588 USB Controller Config Table: USB30 OTG1 */ 856&usbdp_phy1 { 857 status = "okay"; 858}; 859 860&vop { 861 status = "okay"; 862}; 863 864&vop_mmu { 865 status = "okay"; 866}; 867 868&vp0 { 869 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 870 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 871 remote-endpoint = <&hdmi0_in_vp0>; 872 }; 873}; 874 875&vp1 { 876 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 877 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 878 remote-endpoint = <&hdmi1_in_vp1>; 879 }; 880}; 881