1# SPDX-License-Identifier: GPL-2.0 2# 3# Bus Devices 4# 5 6menu "Bus devices" 7 8config ARM_CCI 9 bool 10 11config ARM_CCI400_COMMON 12 bool 13 select ARM_CCI 14 15config ARM_CCI400_PORT_CTRL 16 bool 17 depends on ARM && OF && CPU_V7 18 select ARM_CCI400_COMMON 19 help 20 Low level power management driver for CCI400 cache coherent 21 interconnect for ARM platforms. 22 23config ARM_INTEGRATOR_LM 24 bool "ARM Integrator Logic Module bus" 25 depends on HAS_IOMEM 26 depends on ARCH_INTEGRATOR || COMPILE_TEST 27 default ARCH_INTEGRATOR 28 help 29 Say y here to enable support for the ARM Logic Module bus 30 found on the ARM Integrator AP (Application Platform) 31 32config BRCMSTB_GISB_ARB 33 tristate "Broadcom STB GISB bus arbiter" 34 depends on ARCH_BRCMSTB || BMIPS_GENERIC 35 default ARCH_BRCMSTB || BMIPS_GENERIC 36 help 37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus 38 arbiter. This driver provides timeout and target abort error handling 39 and internal bus master decoding. 40 41config BT1_APB 42 bool "Baikal-T1 APB-bus driver" 43 depends on MIPS_BAIKAL_T1 || COMPILE_TEST 44 select REGMAP_MMIO 45 help 46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs. 47 IO requests are routed to this bus by means of the DW AMBA 3 AXI 48 Interconnect. In case of any APB protocol collisions, slave device 49 not responding on timeout an IRQ is raised with an erroneous address 50 reported to the APB terminator (APB Errors Handler Block). This 51 driver provides the interrupt handler to detect the erroneous 52 address, prints an error message about the address fault, updates an 53 errors counter. The counter and the APB-bus operations timeout can be 54 accessed via corresponding sysfs nodes. 55 56config BT1_AXI 57 bool "Baikal-T1 AXI-bus driver" 58 depends on MIPS_BAIKAL_T1 || COMPILE_TEST 59 select MFD_SYSCON 60 help 61 AXI3-bus is the main communication bus connecting all high-speed 62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on 63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI 64 Interconnect (so called AXI Main Interconnect) routing IO requests 65 from one SoC block to another. This driver provides a way to detect 66 any bus protocol errors and device not responding situations by 67 means of an embedded on top of the interconnect errors handler 68 block (EHB). AXI Interconnect QoS arbitration tuning is currently 69 unsupported. 70 71config MOXTET 72 tristate "CZ.NIC Turris Mox module configuration bus" 73 depends on SPI_MASTER && OF 74 help 75 Say yes here to add support for the module configuration bus found 76 on CZ.NIC's Turris Mox. This is needed for the ability to discover 77 the order in which the modules are connected and to get/set some of 78 their settings. For example the GPIOs on Mox SFP module are 79 configured through this bus. 80 81config HISILICON_LPC 82 bool "Support for ISA I/O space on HiSilicon Hip06/7" 83 depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC) 84 depends on HAS_IOPORT 85 select INDIRECT_PIO if ARM64 86 help 87 Driver to enable I/O access to devices attached to the Low Pin 88 Count bus on the HiSilicon Hip06/7 SoC. 89 90config IMX_AIPSTZ 91 tristate "Support for IMX Secure AHB to IP Slave bus (AIPSTZ) bridge" 92 depends on ARCH_MXC 93 help 94 Enable support for IMX AIPSTZ bridge. 95 96config IMX_WEIM 97 bool "Freescale EIM DRIVER" 98 depends on ARCH_MXC || COMPILE_TEST 99 help 100 Driver for i.MX WEIM controller. 101 The WEIM(Wireless External Interface Module) works like a bus. 102 You can attach many different devices on it, such as NOR, onenand. 103 104config INTEL_IXP4XX_EB 105 bool "Intel IXP4xx expansion bus interface driver" 106 depends on HAS_IOMEM 107 depends on ARCH_IXP4XX || COMPILE_TEST 108 default ARCH_IXP4XX 109 select MFD_SYSCON 110 help 111 Driver for the Intel IXP4xx expansion bus interface. The driver is 112 needed to set up various chip select configuration parameters before 113 devices on the expansion bus can be discovered. 114 115config MIPS_CDMM 116 bool "MIPS Common Device Memory Map (CDMM) Driver" 117 depends on CPU_MIPSR2 || CPU_MIPSR5 118 help 119 Driver needed for the MIPS Common Device Memory Map bus in MIPS 120 cores. This bus is for per-CPU tightly coupled devices such as the 121 Fast Debug Channel (FDC). 122 123 For this to work, either your bootloader needs to enable the CDMM 124 region at an unused physical address on the boot CPU, or else your 125 platform code needs to implement mips_cdmm_phys_base() (see 126 asm/cdmm.h). 127 128config MVEBU_MBUS 129 bool 130 depends on PLAT_ORION 131 help 132 Driver needed for the MBus configuration on Marvell EBU SoCs 133 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). 134 135config OMAP_INTERCONNECT 136 tristate "OMAP INTERCONNECT DRIVER" 137 depends on ARCH_OMAP2PLUS 138 139 help 140 Driver to enable OMAP interconnect error handling driver. 141 142config OMAP_OCP2SCP 143 tristate "OMAP OCP2SCP DRIVER" 144 depends on ARCH_OMAP2PLUS 145 help 146 Driver to enable ocp2scp module which transforms ocp interface 147 protocol to scp protocol. In OMAP4, USB PHY is connected via 148 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via 149 OCP2SCP. 150 151config QCOM_EBI2 152 bool "Qualcomm External Bus Interface 2 (EBI2)" 153 depends on HAS_IOMEM 154 depends on ARCH_QCOM || COMPILE_TEST 155 default ARCH_QCOM 156 help 157 Say y here to enable support for the Qualcomm External Bus 158 Interface 2, which can be used to connect things like NAND Flash, 159 SRAM, ethernet adapters, FPGAs and LCD displays. 160 161config QCOM_SSC_BLOCK_BUS 162 bool "Qualcomm SSC Block Bus Init Driver" 163 depends on ARCH_QCOM 164 help 165 Say y here to enable support for initializing the bus that connects 166 the SSC block's internal bus to the cNoC (configurantion NoC) on 167 (some) qcom SoCs. 168 The SSC (Snapdragon Sensor Core) block contains a gpio controller, 169 i2c/spi/uart controllers, a hexagon core, and a clock controller 170 which provides clocks for the above. 171 172config STM32_FIREWALL 173 bool "STM32 Firewall framework" 174 depends on (ARCH_STM32 || COMPILE_TEST) && OF 175 select OF_DYNAMIC 176 help 177 Say y to enable STM32 firewall framework and its services. Firewall 178 controllers will be able to register to the framework. Access for 179 hardware resources linked to a firewall controller can be requested 180 through this STM32 framework. 181 182config SUN50I_DE2_BUS 183 bool "Allwinner A64 DE2 Bus Driver" 184 default ARM64 185 depends on ARCH_SUNXI 186 select SUNXI_SRAM 187 help 188 Say y here to enable support for Allwinner A64 DE2 bus driver. It's 189 mostly transparent, but a SRAM region needs to be claimed in the SRAM 190 controller to make the all blocks in the DE2 part accessible. 191 192config SUNXI_RSB 193 tristate "Allwinner sunXi Reduced Serial Bus Driver" 194 default MACH_SUN8I || MACH_SUN9I || ARM64 195 depends on ARCH_SUNXI 196 select REGMAP 197 help 198 Say y here to enable support for Allwinner's Reduced Serial Bus 199 (RSB) support. This controller is responsible for communicating 200 with various RSB based devices, such as AXP223, AXP8XX PMICs, 201 and AC100/AC200 ICs. 202 203config TEGRA_ACONNECT 204 tristate "Tegra ACONNECT Bus Driver" 205 depends on ARCH_TEGRA 206 depends on OF && PM 207 help 208 Driver for the Tegra ACONNECT bus which is used to interface with 209 the devices inside the Audio Processing Engine (APE) for 210 Tegra210 and later. 211 212config TEGRA_GMI 213 tristate "Tegra Generic Memory Interface bus driver" 214 depends on ARCH_TEGRA 215 help 216 Driver for the Tegra Generic Memory Interface bus which can be used 217 to attach devices such as NOR, UART, FPGA and more. 218 219config TI_PWMSS 220 bool 221 default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP) 222 help 223 PWM Subsystem driver support for AM33xx SOC. 224 225 PWM submodules require PWM config space access from submodule 226 drivers and require common parent driver support. 227 228config TI_SYSC 229 bool "TI sysc interconnect target module driver" 230 depends on ARCH_OMAP2PLUS || ARCH_K3 231 default y 232 help 233 Generic driver for Texas Instruments interconnect target module 234 found on many TI SoCs. 235 236config TS_NBUS 237 tristate "Technologic Systems NBUS Driver" 238 depends on SOC_IMX28 239 depends on OF_GPIO && PWM 240 help 241 Driver for the Technologic Systems NBUS which is used to interface 242 with the peripherals in the FPGA of the TS-4600 SoM. 243 244config UNIPHIER_SYSTEM_BUS 245 tristate "UniPhier System Bus driver" 246 depends on ARCH_UNIPHIER && OF 247 default y 248 help 249 Support for UniPhier System Bus, a simple external bus. This is 250 needed to use on-board devices connected to UniPhier SoCs. 251 252config VEXPRESS_CONFIG 253 tristate "Versatile Express configuration bus" 254 default y if ARCH_VEXPRESS 255 depends on ARM || ARM64 256 depends on OF 257 select REGMAP 258 help 259 Platform configuration infrastructure for the ARM Ltd. 260 Versatile Express. 261 262config DA8XX_MSTPRI 263 bool "TI da8xx master peripheral priority driver" 264 depends on ARCH_DAVINCI_DA8XX 265 help 266 Driver for Texas Instruments da8xx master peripheral priority 267 configuration. Allows to adjust the priorities of all master 268 peripherals. 269 270source "drivers/bus/fsl-mc/Kconfig" 271source "drivers/bus/mhi/Kconfig" 272 273endmenu 274