| /src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsABIFlagsSection.h | 132 if (P.useSoftFloat()) in setCPR1SizeFromPredicates()
178 if (P.useSoftFloat()) in setFpAbiFromPredicates()
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| /src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallingConv.td | 70 CCIfSubtarget<"useSoftFloat()",
72 CCIfSubtargetNot<"useSoftFloat()",
142 CCIfSubtarget<"useSoftFloat()", CCIfType<[i32],
337 CCIfSubtargetNot<"useSoftFloat()",
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| H A D | MipsSubtarget.h | 338 bool useSoftFloat() const { return IsSoftFloat; } in useSoftFloat() function
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| H A D | MipsISelLowering.h | 677 bool useSoftFloat() const override;
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| H A D | Mips16ISelLowering.cpp | 127 if (!Subtarget.useSoftFloat()) in Mips16TargetLowering()
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| H A D | MipsAsmPrinter.cpp | 788 STI.useSoftFloat()) in emitStartOfAsmFile()
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| H A D | MipsSEFrameLowering.cpp | 672 if (!STI.useSoftFloat()) in emitInterruptPrologueStub()
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| H A D | MipsISelLowering.cpp | 4148 (VT == MVT::f32 && Subtarget.useSoftFloat())) { in getRegForInlineAsmConstraint()
4153 if ((VT == MVT::i64 || (VT == MVT::f64 && Subtarget.useSoftFloat())) && in getRegForInlineAsmConstraint()
4156 if ((VT == MVT::i64 || (VT == MVT::f64 && Subtarget.useSoftFloat())) && in getRegForInlineAsmConstraint()
4360 bool MipsTargetLowering::useSoftFloat() const { in useSoftFloat() function in MipsTargetLowering
4361 return Subtarget.useSoftFloat(); in useSoftFloat()
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| H A D | MipsFastISel.cpp | 257 UnsupportedFPMode = Subtarget->isFP64bit() || Subtarget->useSoftFloat(); in MipsFastISel()
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| /src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.h | 175 bool useSoftFloat() const { in useSoftFloat() function
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| H A D | PPCCallingConv.td | 205 CCIfSplit<CCIfSubtarget<"useSoftFloat()",
210 CCIfSplit<CCIfNotSubtarget<"useSoftFloat()",
215 CCIfSplit<CCIfSubtarget<"useSoftFloat()",
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| H A D | PPCISelLowering.h | 789 bool useSoftFloat() const override;
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| H A D | PPCISelLowering.cpp | 184 if (!useSoftFloat()) { in PPCTargetLowering()
1638 bool PPCTargetLowering::useSoftFloat() const { in useSoftFloat() function in PPCTargetLowering
1639 return Subtarget.useSoftFloat(); in useSoftFloat()
4280 if (useSoftFloat()) in LowerFormalArguments_32SVR4()
4415 if (useSoftFloat() || hasSPE()) in LowerFormalArguments_32SVR4()
4525 const unsigned Num_FPR_Regs = useSoftFloat() ? 0 : 13; in LowerFormalArguments_64SVR4()
6012 if (useSoftFloat()) in LowerCall_32SVR4()
6274 const unsigned NumFPRs = useSoftFloat() ? 0 : 13; in LowerCall_64SVR4()
7199 if (useSoftFloat()) in LowerFormalArguments_AIX()
15123 if (useSoftFloat() || !Subtarget.has64BitSupport()) in combineFPToIntToFP()
[all …]
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| /src/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.h | 70 bool useSoftFloat() const override;
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| H A D | SparcISelLowering.cpp | 1597 if (!Subtarget->useSoftFloat()) { in SparcTargetLowering()
1933 if (Subtarget->is64Bit() && !Subtarget->useSoftFloat()) { in SparcTargetLowering()
1951 } else if (!Subtarget->useSoftFloat()) { in SparcTargetLowering()
1997 bool SparcTargetLowering::useSoftFloat() const { in useSoftFloat() function in SparcTargetLowering
1998 return Subtarget->useSoftFloat(); in useSoftFloat()
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| /src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLegalizerInfo.cpp | 136 if (!ST.useSoftFloat() && ST.hasVFP2Base()) { in ARMLegalizerInfo()
199 if (!ST.useSoftFloat() && ST.hasVFP4Base()) in ARMLegalizerInfo()
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| H A D | ARMBaseRegisterInfo.cpp | 168 if (!STI.useSoftFloat() && STI.hasVFP2Base() && !STI.isThumb1Only()) in getSjLjDispatchPreservedMask()
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| H A D | ARMISelLowering.h | 403 bool useSoftFloat() const override;
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| /src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 413 bool useSoftFloat() const override;
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| H A D | SystemZISelLowering.cpp | 97 if (!useSoftFloat()) { in SystemZTargetLowering()
770 bool SystemZTargetLowering::useSoftFloat() const { in useSoftFloat() function in SystemZTargetLowering
1222 if (!useSoftFloat()) in getSingleConstraintMatchWeight()
1308 if (!useSoftFloat()) { in getRegForInlineAsmConstraint()
1351 if (useSoftFloat()) in getRegForInlineAsmConstraint()
1751 if (NumFixedFPRs < SystemZ::ELFNumArgFPRs && !useSoftFloat()) { in LowerFormalArguments()
6355 !useSoftFloat()) { in LowerOperationWrapper()
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| /src/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86LegalizerInfo.cpp | 45 bool UseX87 = !Subtarget.useSoftFloat() && Subtarget.hasX87(); in X86LegalizerInfo()
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| /src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 429 bool X86TargetLowering::useSoftFloat() const { in useSoftFloat() function in X86TargetLowering
430 return Subtarget.useSoftFloat(); in useSoftFloat()
1441 bool isSoftFloat = Subtarget.useSoftFloat(); in get64BitArgumentXMMs()
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| H A D | X86ISelLowering.h | 984 bool useSoftFloat() const override;
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| H A D | X86ISelLowering.cpp | 130 bool UseX87 = !Subtarget.useSoftFloat() && Subtarget.hasX87(); in X86TargetLowering()
257 if (!Subtarget.useSoftFloat()) { in X86TargetLowering()
393 if (!Subtarget.useSoftFloat() && Subtarget.hasX87()) { in X86TargetLowering()
441 (!Subtarget.useSoftFloat() && Subtarget.hasF16C()) ? Custom : Expand); in X86TargetLowering()
636 if (!Subtarget.useSoftFloat() && Subtarget.hasSSE2()) { in X86TargetLowering()
719 } else if (!Subtarget.useSoftFloat() && Subtarget.hasSSE1() && in X86TargetLowering()
875 if (!Subtarget.useSoftFloat() && Subtarget.is64Bit() && Subtarget.hasSSE1()) { in X86TargetLowering()
1038 if (!Subtarget.useSoftFloat() && Subtarget.hasMMX()) { in X86TargetLowering()
1043 if (!Subtarget.useSoftFloat() && Subtarget.hasSSE1()) { in X86TargetLowering()
1069 if (!Subtarget.useSoftFloat() && Subtarget.hasSSE2()) { in X86TargetLowering()
[all …]
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| H A D | X86FastISel.cpp | 2591 if (Subtarget->useSoftFloat() || !Subtarget->hasF16C()) in fastLowerIntrinsicCall()
3107 if (Subtarget->useSoftFloat()) in fastLowerArguments()
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