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Searched refs:trans_pcie (Results 1 – 9 of 9) sorted by relevance

/src/sys/contrib/dev/iwlwifi/pcie/gen1_2/
H A Drx.c206 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_rxq_check_wrptr() local
210 struct iwl_rxq *rxq = &trans_pcie->rxq[i]; in iwl_pcie_rxq_check_wrptr()
248 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_rxmq_restock() local
270 WARN_ON(rxb->page_dma & trans_pcie->supported_dma_mask); in iwl_pcie_rxmq_restock()
365 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_rx_alloc_page() local
366 unsigned int allocsize = PAGE_SIZE << trans_pcie->rx_page_order; in iwl_pcie_rx_alloc_page()
367 unsigned int rbsize = trans_pcie->rx_buf_bytes; in iwl_pcie_rx_alloc_page()
371 if (trans_pcie->rx_page_order > 0) in iwl_pcie_rx_alloc_page()
374 if (trans_pcie->alloc_page) { in iwl_pcie_rx_alloc_page()
375 spin_lock_bh(&trans_pcie->alloc_page_lock); in iwl_pcie_rx_alloc_page()
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H A Dtrans-gen2.c103 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_fw_reset_handshake() local
106 trans_pcie->fw_reset_state = FW_RESET_REQUESTED; in iwl_trans_pcie_fw_reset_handshake()
119 ret = wait_event_timeout(trans_pcie->fw_reset_waitq, in iwl_trans_pcie_fw_reset_handshake()
120 trans_pcie->fw_reset_state != FW_RESET_REQUESTED, in iwl_trans_pcie_fw_reset_handshake()
122 if (!ret || trans_pcie->fw_reset_state == FW_RESET_ERROR) { in iwl_trans_pcie_fw_reset_handshake()
126 if (trans_pcie->msix_enabled) { in iwl_trans_pcie_fw_reset_handshake()
150 trans_pcie->fw_reset_state = FW_RESET_IDLE; in iwl_trans_pcie_fw_reset_handshake()
155 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in _iwl_trans_pcie_gen2_stop_device() local
157 lockdep_assert_held(&trans_pcie->mutex); in _iwl_trans_pcie_gen2_stop_device()
159 if (trans_pcie->is_down) in _iwl_trans_pcie_gen2_stop_device()
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H A Dinternal.h542 iwl_trans_pcie_get_trans(struct iwl_trans_pcie *trans_pcie) in iwl_trans_pcie_get_trans() argument
544 return container_of((void *)trans_pcie, struct iwl_trans, in iwl_trans_pcie_get_trans()
597 #define IWL_TRANS_PCIE_MAX_FRAGS(trans_pcie) ((trans_pcie)->txqs.tfd.max_tbs - 3) argument
675 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_txq_get_tfd() local
680 return (u8 *)txq->tfds + trans_pcie->txqs.tfd.size * idx; in iwl_txq_get_tfd()
697 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_txq_stop() local
699 if (!test_and_set_bit(txq->id, trans_pcie->txqs.queue_stopped)) { in iwl_txq_stop()
737 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_wake_queue() local
739 if (test_and_clear_bit(txq->id, trans_pcie->txqs.queue_stopped)) { in iwl_trans_pcie_wake_queue()
752 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_txq_set_tfd_invalid_gen2() local
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H A Dtrans.c209 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_apm_config() local
220 pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); in iwl_pcie_apm_config()
221 trans_pcie->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); in iwl_pcie_apm_config()
223 pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_DEVCTL2, &cap); in iwl_pcie_apm_config()
224 trans_pcie->ltr_enabled = cap & PCI_EXP_DEVCTL2_LTR_EN; in iwl_pcie_apm_config()
227 trans_pcie->ltr_enabled ? "En" : "Dis"); in iwl_pcie_apm_config()
491 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_nic_init() local
495 spin_lock_bh(&trans_pcie->irq_lock); in iwl_pcie_nic_init()
497 spin_unlock_bh(&trans_pcie->irq_lock); in iwl_pcie_nic_init()
643 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_load_firmware_chunk() local
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H A Dtx.c131 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_txq_check_wrptrs() local
135 struct iwl_txq *txq = trans_pcie->txqs.txq[i]; in iwl_pcie_txq_check_wrptrs()
137 if (!test_bit(i, trans_pcie->txqs.queue_used)) in iwl_pcie_txq_check_wrptrs()
171 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_txq_build_tfd() local
175 tfd = (u8 *)txq->tfds + trans_pcie->txqs.tfd.size * txq->write_ptr; in iwl_pcie_txq_build_tfd()
178 memset(tfd, 0, trans_pcie->txqs.tfd.size); in iwl_pcie_txq_build_tfd()
183 if (num_tbs >= trans_pcie->txqs.tfd.max_tbs) { in iwl_pcie_txq_build_tfd()
185 trans_pcie->txqs.tfd.max_tbs); in iwl_pcie_txq_build_tfd()
200 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_clear_cmd_in_flight() local
205 spin_lock(&trans_pcie->reg_lock); in iwl_pcie_clear_cmd_in_flight()
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H A Dtx-gen2.c606 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_txq_gen2_set_tb() local
625 if (le16_to_cpu(tfd->num_tbs) >= trans_pcie->txqs.tfd.max_tbs) { in iwl_txq_gen2_set_tb()
627 trans_pcie->txqs.tfd.max_tbs); in iwl_txq_gen2_set_tb()
643 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_txq_gen2_tfd_unmap() local
649 if (num_tbs > trans_pcie->txqs.tfd.max_tbs) { in iwl_txq_gen2_tfd_unmap()
722 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_txq_gen2_tx() local
724 struct iwl_txq *txq = trans_pcie->txqs.txq[txq_id]; in iwl_txq_gen2_tx()
733 if (WARN_ONCE(!test_bit(txq_id, trans_pcie->txqs.queue_used), in iwl_txq_gen2_tx()
738 skb_shinfo(skb)->nr_frags > IWL_TRANS_PCIE_MAX_FRAGS(trans_pcie) && in iwl_txq_gen2_tx()
820 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_txq_gen2_unmap() local
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/src/sys/contrib/dev/iwlwifi/pcie/
H A Dctxt-info-v2.c104 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_v2_alloc() local
146 &trans_pcie->prph_scratch_dma_addr, in iwl_pcie_ctxt_info_v2_alloc()
179 cpu_to_le64(trans_pcie->rxq->bd_dma); in iwl_pcie_ctxt_info_v2_alloc()
208 &trans_pcie->prph_info_dma_addr, in iwl_pcie_ctxt_info_v2_alloc()
218 &trans_pcie->ctxt_info_dma_addr, in iwl_pcie_ctxt_info_v2_alloc()
226 cpu_to_le64(trans_pcie->prph_info_dma_addr); in iwl_pcie_ctxt_info_v2_alloc()
228 cpu_to_le64(trans_pcie->prph_scratch_dma_addr); in iwl_pcie_ctxt_info_v2_alloc()
247 cpu_to_le64(trans_pcie->rxq->rb_stts_dma); in iwl_pcie_ctxt_info_v2_alloc()
249 cpu_to_le64(trans_pcie->prph_info_dma_addr + PAGE_SIZE / 2); in iwl_pcie_ctxt_info_v2_alloc()
251 cpu_to_le64(trans_pcie->prph_info_dma_addr + 3 * PAGE_SIZE / 4); in iwl_pcie_ctxt_info_v2_alloc()
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H A Dctxt-info.c166 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_init() local
179 trans_pcie->ctxt_info_dma_addr = phys; in iwl_pcie_ctxt_info_init()
216 rx_cfg->free_rbd_addr = cpu_to_le64(trans_pcie->rxq->bd_dma); in iwl_pcie_ctxt_info_init()
217 rx_cfg->used_rbd_addr = cpu_to_le64(trans_pcie->rxq->used_bd_dma); in iwl_pcie_ctxt_info_init()
218 rx_cfg->status_wr_ptr = cpu_to_le64(trans_pcie->rxq->rb_stts_dma); in iwl_pcie_ctxt_info_init()
222 cpu_to_le64(trans_pcie->txqs.txq[trans->conf.cmd_queue]->dma_addr); in iwl_pcie_ctxt_info_init()
229 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info), in iwl_pcie_ctxt_info_init()
230 ctxt_info, trans_pcie->ctxt_info_dma_addr); in iwl_pcie_ctxt_info_init()
234 trans_pcie->ctxt_info = ctxt_info; in iwl_pcie_ctxt_info_init()
243 iwl_write64(trans, CSR_CTXT_INFO_BA, trans_pcie->ctxt_info_dma_addr); in iwl_pcie_ctxt_info_init()
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H A Ddrv.c1226 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in _iwl_pci_resume() local
1288 iwl_pcie_conf_msix_hw(trans_pcie); in _iwl_pci_resume()
1295 mutex_lock(&trans_pcie->mutex); in _iwl_pci_resume()
1298 mutex_unlock(&trans_pcie->mutex); in _iwl_pci_resume()