| /src/contrib/llvm-project/libunwind/src/ |
| H A D | CompactUnwinder.hpp | 541 registers.setRegister(UNW_AARCH64_X19, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 543 registers.setRegister(UNW_AARCH64_X20, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 547 registers.setRegister(UNW_AARCH64_X21, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 549 registers.setRegister(UNW_AARCH64_X22, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 553 registers.setRegister(UNW_AARCH64_X23, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 555 registers.setRegister(UNW_AARCH64_X24, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 559 registers.setRegister(UNW_AARCH64_X25, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 561 registers.setRegister(UNW_AARCH64_X26, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 565 registers.setRegister(UNW_AARCH64_X27, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 567 registers.setRegister(UNW_AARCH64_X28, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() [all …]
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| H A D | DwarfParser.hpp | 106 void setRegister(uint64_t reg, RegisterSavedWhere newLocation, in setRegister() function 498 results->setRegister(reg, kRegisterInCFA, offset, initialState); in parseFDEInstructions() 551 results->setRegister(reg, kRegisterInRegister, (int64_t)reg2, in parseFDEInstructions() 629 results->setRegister(reg, kRegisterAtExpression, (int64_t)p, in parseFDEInstructions() 648 results->setRegister(reg, kRegisterInCFA, offset, initialState); in parseFDEInstructions() 686 results->setRegister(reg, kRegisterOffsetFromCFA, offset, initialState); in parseFDEInstructions() 700 results->setRegister(reg, kRegisterOffsetFromCFA, offset, initialState); in parseFDEInstructions() 712 results->setRegister(reg, kRegisterIsExpression, (int64_t)p, in parseFDEInstructions() 736 results->setRegister(reg, kRegisterInCFA, -offset, initialState); in parseFDEInstructions() 764 results->setRegister(reg, kRegisterInRegister, in parseFDEInstructions() [all …]
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| H A D | Registers.hpp | 65 void setRegister(int num, uint32_t value); 175 inline void Registers_x86::setRegister(int regNum, uint32_t value) { in setRegister() function in libunwind::Registers_x86 283 void setRegister(int num, uint64_t value); 412 inline void Registers_x86_64::setRegister(int regNum, uint64_t value) { in setRegister() function in libunwind::Registers_x86_64 602 void setRegister(int num, uint32_t value); 821 inline void Registers_ppc::setRegister(int regNum, uint32_t value) { in setRegister() function in libunwind::Registers_ppc 1174 void setRegister(int num, uint64_t value); 1390 inline void Registers_ppc64::setRegister(int regNum, uint64_t value) { in setRegister() function in libunwind::Registers_ppc64 1832 void setRegister(int num, uint64_t value); 1919 inline void Registers_arm64::setRegister(int regNum, uint64_t value) { in setRegister() function in libunwind::Registers_arm64 [all …]
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| H A D | UnwindCursor.hpp | 1354 _registers.setRegister(regNum, (typename A::pint_t)value); in setReg() 2385 newRegisters.setRegister(i, sigContext->sc_jmpbuf.jmp_context.gpr[i]); in stepWithTBTable() 2441 newRegisters.setRegister(32 - TBTable->tb.gpr_saved + i, GPRegs[i]); in stepWithTBTable() 2524 newRegisters.setRegister(2, reinterpret_cast<pint_t *>(lastStack)[5]); in stepWithTBTable() 2753 _registers.setRegister(UNW_AARCH64_X0 + i, value); in stepThroughSigReturn() 2808 _registers.setRegister(i, value); in stepThroughSigReturn() 2894 _registers.setRegister(UNW_S390X_R0 + i, value); in stepThroughSigReturn()
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| H A D | DwarfInstructions.hpp | 266 newRegisters.setRegister( in stepWithDwarf() 354 newRegisters.setRegister(UNW_PPC64_R2, r2); in stepWithDwarf()
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUPALMetadata.cpp | 63 setRegister(Key->getZExtValue(), Val->getZExtValue()); in readFromIR() 81 setRegister(Data[I * 2], Data[I * 2 + 1]); in setFromLegacyBlob() 138 setRegister(getRsrc1Reg(CC), Val); in setRsrc1() 143 setRegister(getRsrc1Reg(CC), Val, Ctx); in setRsrc1() 149 setRegister(getRsrc1Reg(CC) + 1, Val); in setRsrc2() 154 setRegister(getRsrc1Reg(CC) + 1, Val, Ctx); in setRsrc2() 160 setRegister(PALMD::R_A1B3_SPI_PS_INPUT_ENA, Val); in setSpiPsInputEna() 166 setRegister(PALMD::R_A1B4_SPI_PS_INPUT_ADDR, Val); in setSpiPsInputAddr() 183 void AMDGPUPALMetadata::setRegister(unsigned Reg, unsigned Val) { in setRegister() function in AMDGPUPALMetadata 198 void AMDGPUPALMetadata::setRegister(unsigned Reg, const MCExpr *Val, in setRegister() function in AMDGPUPALMetadata [all …]
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| H A D | AMDGPUPALMetadata.h | 79 void setRegister(unsigned Reg, unsigned Val); 80 void setRegister(unsigned Reg, const MCExpr *Val, MCContext &Ctx);
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| /src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CleanupLocalDynamicTLSPass.cpp | 80 I = setRegister(*I, &TLSBaseAddrReg); in VisitNode() 121 MachineInstr *setRegister(MachineInstr &I, unsigned *TLSBaseAddrReg) { in setRegister() function
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| /src/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MachineLocation.h | 49 void setRegister(unsigned R) { Register = R; } in setRegister() function
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| /src/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 142 void setRegister(uint32_t NewRegNum) { RegNum = NewRegNum; } in setRegister() function
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| /src/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 741 Row.getCFAValue().setRegister(*RegNum); in parseRows()
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 6105 PALMetadata->setRegister(Key, Value); in ParseDirectivePALMetadata()
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