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Searched refs:sc_data (Results 1 – 24 of 24) sorted by relevance

/src/contrib/jemalloc/src/
H A Dsc.c87 sc_data_t *sc_data, in size_classes() argument
114 sc_t *sc = &sc_data->sc[index]; in size_classes()
136 sc_t *sc = &sc_data->sc[index]; in size_classes()
156 sc_t *sc = &sc_data->sc[index]; in size_classes()
180 sc_t *sc = &sc_data->sc[index]; in size_classes()
216 sc_data->ntiny = ntiny; in size_classes()
217 sc_data->nlbins = nlbins; in size_classes()
218 sc_data->nbins = nbins; in size_classes()
219 sc_data->nsizes = nsizes; in size_classes()
220 sc_data->lg_ceil_nsizes = lg_ceil_nsizes; in size_classes()
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H A Dsz.c57 sz_boot_pind2sz_tab(const sc_data_t *sc_data) { in sz_boot_pind2sz_tab() argument
60 const sc_t *sc = &sc_data->sc[i]; in sz_boot_pind2sz_tab()
68 sz_pind2sz_tab[pind] = sc_data->large_maxclass + PAGE; in sz_boot_pind2sz_tab()
76 sz_boot_index2size_tab(const sc_data_t *sc_data) {
78 const sc_t *sc = &sc_data->sc[i];
92 sz_boot_size2index_tab(const sc_data_t *sc_data) {
97 const sc_t *sc = &sc_data->sc[sc_ind];
109 sz_boot(const sc_data_t *sc_data, bool cache_oblivious) { in sz_boot() argument
111 sz_boot_pind2sz_tab(sc_data); in sz_boot()
112 sz_boot_index2size_tab(sc_data); in sz_boot()
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H A Dbin_info.c9 bin_infos_init(sc_data_t *sc_data, unsigned bin_shard_sizes[SC_NBINS], in bin_infos_init() argument
13 sc_t *sc = &sc_data->sc[i]; in bin_infos_init()
27 bin_info_boot(sc_data_t *sc_data, unsigned bin_shard_sizes[SC_NBINS]) { in bin_info_boot() argument
28 assert(sc_data->initialized); in bin_info_boot()
29 bin_infos_init(sc_data, bin_shard_sizes, bin_infos); in bin_info_boot()
H A Djemalloc.c1070 malloc_conf_init_helper(sc_data_t *sc_data, unsigned bin_shard_sizes[SC_NBINS], in malloc_conf_init_helper() argument
1546 sc_data_init(sc_data); in malloc_conf_init_helper()
1562 sc_data, slab_start, in malloc_conf_init_helper()
1748 malloc_conf_init(sc_data_t *sc_data, unsigned bin_shard_sizes[SC_NBINS]) { in malloc_conf_init() argument
1755 malloc_conf_init_helper(sc_data, bin_shard_sizes, false, opts_cache, in malloc_conf_init()
1799 sc_data_t sc_data = {0}; in malloc_init_hard_a0_locked() local
1809 sc_boot(&sc_data); in malloc_init_hard_a0_locked()
1820 malloc_conf_init(&sc_data, bin_shard_sizes); in malloc_init_hard_a0_locked()
1822 sz_boot(&sc_data, opt_cache_oblivious); in malloc_init_hard_a0_locked()
1823 bin_info_boot(&sc_data, bin_shard_sizes); in malloc_init_hard_a0_locked()
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H A Darena.c1773 arena_boot(sc_data_t *sc_data, base_t *base, bool hpa) { in arena_boot() argument
1777 sc_t *sc = &sc_data->sc[i]; in arena_boot()
/src/sys/dev/usb/gadget/
H A Dg_keyboard.c116 struct g_keyboard_data sc_data[2]; member
321 memset(&sc->sc_data, 0, sizeof(sc->sc_data)); in g_keyboard_intr_callback()
322 usbd_xfer_set_frame_data(xfer, 0, &sc->sc_data[0], sizeof(sc->sc_data[0])); in g_keyboard_intr_callback()
323 usbd_xfer_set_frame_data(xfer, 1, &sc->sc_data[1], sizeof(sc->sc_data[1])); in g_keyboard_intr_callback()
328 memset(&sc->sc_data, 0, sizeof(sc->sc_data)); in g_keyboard_intr_callback()
335 sc->sc_data[0].keycode[0] = in g_keyboard_intr_callback()
338 sc->sc_data[0].keycode[1] = in g_keyboard_intr_callback()
341 sc->sc_data[0].keycode[2] = in g_keyboard_intr_callback()
344 sc->sc_data[0].keycode[3] = in g_keyboard_intr_callback()
347 sc->sc_data[0].keycode[4] = in g_keyboard_intr_callback()
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H A Dg_mouse.c111 struct g_mouse_data sc_data; member
175 sc->sc_data.buttons = 0; in g_mouse_button_press_timeout_reset()
196 sc->sc_data.dx = 0; in g_mouse_cursor_update_timeout_reset()
197 sc->sc_data.dy = 0; in g_mouse_cursor_update_timeout_reset()
365 sc->sc_data.buttons ^= BUT_0; in g_mouse_intr_callback()
372 sc->sc_data.buttons = 0; in g_mouse_intr_callback()
416 sc->sc_data.dx = dx; in g_mouse_intr_callback()
417 sc->sc_data.dy = dy; in g_mouse_intr_callback()
419 usbd_xfer_set_frame_data(xfer, 0, &sc->sc_data, sizeof(sc->sc_data)); in g_mouse_intr_callback()
/src/sys/dev/powermac_nvram/
H A Dpowermac_nvram.c173 bcopy(sc->sc_bank, sc->sc_data, NVRAM_SIZE); in powermac_nvram_attach()
228 if (sc->sc_wpos != sizeof(sc->sc_data)) { in powermac_nvram_close()
230 bcopy(sc->sc_bank, sc->sc_data, NVRAM_SIZE); in powermac_nvram_close()
236 header = (struct core99_header *)sc->sc_data; in powermac_nvram_close()
251 write_bank(sc->sc_dev, bank, sc->sc_data) != 0) { in powermac_nvram_close()
272 data_available = sizeof(sc->sc_data) - sc->sc_rpos; in powermac_nvram_read()
275 rv = uiomove((void *)(sc->sc_data + sc->sc_rpos), in powermac_nvram_read()
295 if (sc->sc_wpos >= sizeof(sc->sc_data)) in powermac_nvram_write()
302 data_available = sizeof(sc->sc_data) - sc->sc_wpos; in powermac_nvram_write()
305 rv = uiomove((void *)(sc->sc_data + sc->sc_wpos), in powermac_nvram_write()
H A Dpowermac_nvramvar.h55 uint8_t sc_data[NVRAM_SIZE]; member
/src/sys/powerpc/powermac/
H A Dgrackle.c134 sc->sc_data = (vm_offset_t)pmap_mapdev(GRACKLE_DATA, PAGE_SIZE); in grackle_attach()
148 caoff = sc->sc_data + (reg & 0x03); in grackle_read_config()
157 if (badaddr((void *)sc->sc_data, 4)) { in grackle_read_config()
187 caoff = sc->sc_data + (reg & 0x03); in grackle_write_config()
H A Dkiic.c109 u_char *sc_data; member
317 kiic_writereg(sc, DATA, *sc->sc_data++); in kiic_intr()
325 *sc->sc_data++ = kiic_readreg(sc, DATA); in kiic_intr()
336 kiic_writereg(sc, DATA, *sc->sc_data++); in kiic_intr()
393 sc->sc_data = msgs[i].buf; in kiic_transfer()
H A Duninorthpci.c166 sc->sc_data = (vm_offset_t)pmap_mapdev(regbase + 0xc00000, PAGE_SIZE); in uninorth_attach()
185 caoff = sc->sc_data + (reg & 0x07); in uninorth_read_config()
215 caoff = sc->sc_data + (reg & 0x07); in uninorth_write_config()
H A Dcpcht.c131 vm_offset_t sc_data; member
187 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1], reg[2]); in cpcht_attach()
290 sc->htirq_map[irq].ht_base = sc->sc_data + in cpcht_configure_htbridge()
321 caoff = sc->sc_data + in cpcht_read_config()
353 caoff = sc->sc_data + in cpcht_write_config()
H A Dgracklevar.h36 vm_offset_t sc_data; member
H A Duninorthvar.h38 vm_offset_t sc_data; member
/src/sys/arm/broadcom/bcm2835/
H A Dbcm2835_bsc.c383 sc->sc_data = sc->sc_curmsg->buf; in bcm_bsc_empty_rx_fifo()
389 *sc->sc_data = BCM_BSC_READ(sc, BCM_BSC_DATA); in bcm_bsc_empty_rx_fifo()
390 DEBUGF(sc, 1, "0x%02x ", *sc->sc_data); in bcm_bsc_empty_rx_fifo()
391 ++sc->sc_data; in bcm_bsc_empty_rx_fifo()
407 sc->sc_data = sc->sc_curmsg->buf; in bcm_bsc_fill_tx_fifo()
413 BCM_BSC_WRITE(sc, BCM_BSC_DATA, *sc->sc_data); in bcm_bsc_fill_tx_fifo()
414 DEBUGF(sc, 1, "0x%02x ", *sc->sc_data); in bcm_bsc_fill_tx_fifo()
415 ++sc->sc_data; in bcm_bsc_fill_tx_fifo()
H A Dbcm2835_bscvar.h50 uint8_t * sc_data; member
/src/sys/dev/aic7xxx/
H A Daic79xx_pci.c631 uint16_t *sc_data; in ahd_check_extport() local
635 sc_data = (uint16_t *)sc; in ahd_check_extport()
637 *sc_data++ = ahd_inw_scbram(ahd, SCB_BASE+i); in ahd_check_extport()
647 uint16_t *sc_data; in ahd_check_extport() local
651 sc_data = (uint16_t *)sc; in ahd_check_extport()
653 printf("\n\t0x%.4x", sc_data[i]); in ahd_check_extport()
H A Daic7xxx_pci.c1414 uint16_t *sc_data; in check_extport() local
1417 sc_data = (uint16_t *)sc; in check_extport()
1418 for (i = 0; i < 32; i++, sc_data++) { in check_extport()
1422 *sc_data = ahc_inb(ahc, SRAM_BASE + j) in check_extport()
/src/contrib/jemalloc/include/jemalloc/internal/
H A Dbin_info.h48 void bin_info_boot(sc_data_t *sc_data, unsigned bin_shard_sizes[SC_NBINS]);
H A Darena_externs.h108 bool arena_boot(sc_data_t *sc_data, base_t *base, bool hpa);
H A Dsz.h54 extern void sz_boot(const sc_data_t *sc_data, bool cache_oblivious);
/src/sys/dev/usb/net/
H A Dif_ipheth.c225 error = usbd_do_request(sc->sc_ue.ue_udev, NULL, &req, sc->sc_data); in ipheth_get_mac_addr()
230 memcpy(sc->sc_ue.ue_eaddr, sc->sc_data, ETHER_ADDR_LEN); in ipheth_get_mac_addr()
379 error = uether_do_request(ue, &req, sc->sc_data, IPHETH_CTRL_TIMEOUT); in ipheth_tick()
385 (sc->sc_data[0] == IPHETH_CARRIER_ON); in ipheth_tick()
H A Dif_iphethvar.h87 uint8_t sc_data[IPHETH_CTRL_BUF_SIZE]; member