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/src/sys/dev/gve/
H A Dgve_rx_dqo.c36 gve_free_rx_mbufs_dqo(struct gve_rx_ring *rx) in gve_free_rx_mbufs_dqo() argument
41 if (gve_is_qpl(rx->com.priv)) in gve_free_rx_mbufs_dqo()
44 for (i = 0; i < rx->dqo.buf_cnt; i++) { in gve_free_rx_mbufs_dqo()
45 buf = &rx->dqo.bufs[i]; in gve_free_rx_mbufs_dqo()
49 bus_dmamap_sync(rx->dqo.buf_dmatag, buf->dmamap, in gve_free_rx_mbufs_dqo()
51 bus_dmamap_unload(rx->dqo.buf_dmatag, buf->dmamap); in gve_free_rx_mbufs_dqo()
60 struct gve_rx_ring *rx = &priv->rx[i]; in gve_rx_free_ring_dqo() local
61 struct gve_ring_com *com = &rx->com; in gve_rx_free_ring_dqo()
64 if (rx->dqo.compl_ring != NULL) { in gve_rx_free_ring_dqo()
65 gve_dma_free_coherent(&rx->dqo.compl_ring_mem); in gve_rx_free_ring_dqo()
[all …]
H A Dgve_rx.c38 struct gve_rx_ring *rx = &priv->rx[i]; in gve_rx_free_ring_gqi() local
39 struct gve_ring_com *com = &rx->com; in gve_rx_free_ring_gqi()
41 if (rx->page_info != NULL) { in gve_rx_free_ring_gqi()
42 free(rx->page_info, M_GVE); in gve_rx_free_ring_gqi()
43 rx->page_info = NULL; in gve_rx_free_ring_gqi()
46 if (rx->data_ring != NULL) { in gve_rx_free_ring_gqi()
47 gve_dma_free_coherent(&rx->data_ring_mem); in gve_rx_free_ring_gqi()
48 rx->data_ring = NULL; in gve_rx_free_ring_gqi()
51 if (rx->desc_ring != NULL) { in gve_rx_free_ring_gqi()
52 gve_dma_free_coherent(&rx->desc_ring_mem); in gve_rx_free_ring_gqi()
[all …]
/src/contrib/llvm-project/llvm/lib/CodeGen/
H A DExecutionDomainFix.cpp70 void ExecutionDomainFix::setLiveReg(int rx, DomainValue *dv) { in setLiveReg() argument
71 assert(unsigned(rx) < NumRegs && "Invalid index"); in setLiveReg()
74 if (LiveRegs[rx] == dv) in setLiveReg()
76 if (LiveRegs[rx]) in setLiveReg()
77 release(LiveRegs[rx]); in setLiveReg()
78 LiveRegs[rx] = retain(dv); in setLiveReg()
81 void ExecutionDomainFix::kill(int rx) { in kill() argument
82 assert(unsigned(rx) < NumRegs && "Invalid index"); in kill()
84 if (!LiveRegs[rx]) in kill()
87 release(LiveRegs[rx]); in kill()
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/src/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats16Instr.td28 (outs mGPR:$rz), (ins mGPR:$rx, mGPR:$ry), !strconcat(opstr, "\t$rz, $rx, $ry"),
29 [(set mGPR:$rz, (opnode mGPR:$rx, mGPR:$ry)) ]> {
31 bits<3> rx;
34 let Inst{10 - 8} = rx;
41 AddrModeNone, (outs sGPR:$rz), (ins sGPR:$rZ, sGPR:$rx), !strconcat(opstr, "\t$rz, $rx"),
42 [(set sGPR:$rz, (opnode sGPR:$rZ, sGPR:$rx))]> {
44 bits<4> rx;
48 let Inst{5 - 2} = rx;
54 AddrModeNone, (outs sGPR:$rz), (ins sGPR:$rZ, sGPR:$rx), !strconcat(opstr, "\t$rz, $rx"),
57 bits<4> rx;
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H A DCSKYInstrFormats.td81 (outs GPR:$rz), (ins GPR:$rx,ImmType:$imm16),
82 !strconcat(op, "\t$rz, $rx, $imm16"), pattern> {
84 bits<5> rx;
87 let Inst{20 - 16} = rx;
132 : CSKY32Inst<AddrModeNone, 0x3a, (outs), (ins GPR:$rx),
133 !strconcat(op, "\t$rx"), pattern> {
134 bits<5> rx;
137 let Inst{20 - 16} = rx;
145 (ins GPR:$rx, operand:$imm2),
146 !strconcat(op, "\t$rx, $imm2"), pattern> {
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H A DCSKYInstrInfo.td528 [(set GPR:$rz, (or GPR:$rx, uimm16:$imm16))]>;
533 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
534 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
536 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
537 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
539 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
540 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
542 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
543 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
545 def ROTRI32 : CSKYPseudo<(outs GPR:$rz), (ins GPR:$rx, oimm5:$imm5),
[all …]
H A DCSKYInstrFormatsF1.td42 bits<5> rx;
45 let Inst{20 - 16} = {rx};
56 : F_XZ_FG<3, sop, (outs regtype1:$vrz), (ins regtype2:$rx), !strconcat(op, "\t$vrz, $rx"),
144 bits<5> rx;
149 let Inst{20 - 16} = rx; //rx
159 bits<5> rx;
163 let Inst{20 - 16} = rx; //rx
176 let Inst{20 - 16} = 0; //rx
185 bits<5> rx;
191 let Inst{20 - 16} = rx; // rx;
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H A DCSKYInstrInfoF2.td61 def f2FLD_S : F2_LDST_S<0b0, "fld", (outs FPR32Op:$vrz), (ins GPR:$rx, uimm8_2:$imm8)>;
63 def f2FLD_D : F2_LDST_D<0b0, "fld", (outs FPR64Op:$vrz), (ins GPR:$rx, uimm8_2:$imm8)>;
66 def f2FST_S : F2_LDST_S<0b1, "fst", (outs), (ins FPR32Op:$vrz, GPR:$rx, uimm8_2:$imm8)>;
68 def f2FST_D : F2_LDST_D<0b1, "fst", (outs), (ins FPR64Op:$vrz, GPR:$rx, uimm8_2:$imm8)>;
72 def f2FSTM_S : F2_LDSTM_S<0b1, 0, "fstm", (outs), (ins GPR:$rx, regseq_f2:$regs, variable_ops)>;
74 def f2FSTM_D : F2_LDSTM_D<0b1, 0, "fstm", (outs), (ins GPR:$rx, regseq_d2:$regs, variable_ops)>;
76 …def f2FSTMU_S : F2_LDSTM_S<0b1, 0b100, "fstmu", (outs), (ins GPR:$rx, regseq_f2:$regs, variable_op…
78 …def f2FSTMU_D : F2_LDSTM_D<0b1, 0b100, "fstmu", (outs), (ins GPR:$rx, regseq_d2:$regs, variable_op…
82 def f2FLDM_S : F2_LDSTM_S<0b0, 0, "fldm", (outs), (ins GPR:$rx, regseq_f2:$regs, variable_ops)>;
84 def f2FLDM_D : F2_LDSTM_D<0b0, 0, "fldm", (outs), (ins GPR:$rx, regseq_d2:$regs, variable_ops)>;
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/src/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_calib.c72 uint16_t rx[2]) in r92ce_iq_calib_chain()
123 rx[0] = MS(rtwn_bb_read(sc, R92C_RX_POWER_IQK_BEFORE(chain)), in r92ce_iq_calib_chain()
125 rx[1] = MS(rtwn_bb_read(sc, R92C_RX_POWER_IQK_AFTER(chain)), in r92ce_iq_calib_chain()
127 if (rx[0] == 0x132 || rx[1] == 0x036) in r92ce_iq_calib_chain()
135 uint16_t rx[2][2], struct r92ce_iq_cal_reg_vals *vals) in r92ce_iq_calib_run()
226 tx[chain], rx[chain]); in r92ce_iq_calib_run()
233 rx[chain][0] = 0xff; in r92ce_iq_calib_run()
234 rx[chain][1] = 0xff; in r92ce_iq_calib_run()
239 rx[chain][0] = 0xff; in r92ce_iq_calib_run()
240 rx[chain][1] = 0xff; in r92ce_iq_calib_run()
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/src/lib/msun/src/
H A Dcatrigf.c87 do_hard_work(float x, float y, float *rx, int *B_is_usable, float *B, in do_hard_work() argument
102 *rx = sqrtf(x); in do_hard_work()
105 *rx = log1pf(Am1 + sqrtf(Am1 * (A + 1))); in do_hard_work()
107 *rx = x / sqrtf((1 - y) * (1 + y)); in do_hard_work()
109 *rx = log1pf((y - 1) + sqrtf((y - 1) * (y + 1))); in do_hard_work()
112 *rx = logf(A + sqrtf(A * A - 1)); in do_hard_work()
147 float x, y, ax, ay, rx, ry, B, sqrt_A2my2, new_y; in casinhf() local
183 do_hard_work(ax, ay, &rx, &B_is_usable, &B, &sqrt_A2my2, &new_y); in casinhf()
188 return (CMPLXF(copysignf(rx, x), copysignf(ry, y))); in casinhf()
202 float x, y, ax, ay, rx, ry, B, sqrt_A2mx2, new_x; in cacosf() local
[all …]
H A Dcatrigl.c106 do_hard_work(long double x, long double y, long double *rx, int *B_is_usable, in do_hard_work() argument
121 *rx = sqrtl(x); in do_hard_work()
124 *rx = log1pl(Am1 + sqrtl(Am1 * (A + 1))); in do_hard_work()
126 *rx = x / sqrtl((1 - y) * (1 + y)); in do_hard_work()
128 *rx = log1pl((y - 1) + sqrtl((y - 1) * (y + 1))); in do_hard_work()
131 *rx = logl(A + sqrtl(A * A - 1)); in do_hard_work()
166 long double x, y, ax, ay, rx, ry, B, sqrt_A2my2, new_y; in casinhl() local
202 do_hard_work(ax, ay, &rx, &B_is_usable, &B, &sqrt_A2my2, &new_y); in casinhl()
207 return (CMPLXL(copysignl(rx, x), copysignl(ry, y))); in casinhl()
222 long double x, y, ax, ay, rx, ry, B, sqrt_A2mx2, new_x; in cacosl() local
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H A Dcatrig.c152 do_hard_work(double x, double y, double *rx, int *B_is_usable, double *B, in do_hard_work() argument
181 *rx = sqrt(x); in do_hard_work()
188 *rx = log1p(Am1 + sqrt(Am1 * (A + 1))); in do_hard_work()
194 *rx = x / sqrt((1 - y) * (1 + y)); in do_hard_work()
199 *rx = log1p((y - 1) + sqrt((y - 1) * (y + 1))); in do_hard_work()
202 *rx = log(A + sqrt(A * A - 1)); in do_hard_work()
276 double x, y, ax, ay, rx, ry, B, sqrt_A2my2, new_y; in casinh() local
322 do_hard_work(ax, ay, &rx, &B_is_usable, &B, &sqrt_A2my2, &new_y); in casinh()
327 return (CMPLX(copysign(rx, x), copysign(ry, y))); in casinh()
357 double x, y, ax, ay, rx, ry, B, sqrt_A2mx2, new_x; in cacos() local
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/src/sys/contrib/libsodium/src/libsodium/crypto_kx/
H A Dcrypto_kx.c34 crypto_kx_client_session_keys(unsigned char rx[crypto_kx_SESSIONKEYBYTES], in crypto_kx_client_session_keys()
45 if (rx == NULL) { in crypto_kx_client_session_keys()
46 rx = tx; in crypto_kx_client_session_keys()
49 tx = rx; in crypto_kx_client_session_keys()
51 if (rx == NULL) { in crypto_kx_client_session_keys()
66 rx[i] = keys[i]; in crypto_kx_client_session_keys()
75 crypto_kx_server_session_keys(unsigned char rx[crypto_kx_SESSIONKEYBYTES], in crypto_kx_server_session_keys()
86 if (rx == NULL) { in crypto_kx_server_session_keys()
87 rx = tx; in crypto_kx_server_session_keys()
90 tx = rx; in crypto_kx_server_session_keys()
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/src/sys/netpfil/ipfilter/netinet/
H A Dip_rpcb_pxy.c271 rpcb_xact_t *rx; in ipf_p_rpcb_out() local
282 rx = NULL; in ipf_p_rpcb_out()
300 rx = NULL; /* XXX gcc */ in ipf_p_rpcb_out()
303 rv = ipf_p_rpcb_decoderep(fin, nat, rs, rm, &rx); in ipf_p_rpcb_out()
308 if (rx != NULL) { in ipf_p_rpcb_out()
310 ipf_p_rpcb_deref(rs, rx); in ipf_p_rpcb_out()
327 if (rx->rx_type == RPCB_RES_STRING) in ipf_p_rpcb_out()
329 else if (rx->rx_type == RPCB_RES_LIST) in ipf_p_rpcb_out()
338 if (rx != NULL) { in ipf_p_rpcb_out()
346 ipf_p_rpcb_deref(rs, rx); in ipf_p_rpcb_out()
[all …]
/src/sys/dev/rtwn/rtl8188e/
H A Dr88e_calib.c66 r88e_iq_calib_chain(struct rtwn_softc *sc, uint16_t tx[2], uint16_t rx[2]) in r88e_iq_calib_chain()
146 rx[0] = MS(rtwn_bb_read(sc, R92C_RX_POWER_IQK_BEFORE(0)), in r88e_iq_calib_chain()
148 rx[1] = MS(status, R92C_POWER_IQK_RESULT); in r88e_iq_calib_chain()
149 if (rx[0] == 0x132 || rx[1] == 0x036) in r88e_iq_calib_chain()
157 uint16_t rx[2], struct r88e_iq_cal_reg_vals *vals) in r88e_iq_calib_run()
235 ret = r88e_iq_calib_chain(sc, tx, rx); in r88e_iq_calib_run()
241 rx[0] = 0xff; in r88e_iq_calib_run()
242 rx[1] = 0xff; in r88e_iq_calib_run()
246 rx[0] = 0xff; in r88e_iq_calib_run()
247 rx[1] = 0xff; in r88e_iq_calib_run()
[all …]
/src/sys/dev/rtwn/rtl8192c/
H A Dr92c_calib.c72 uint16_t rx[2]) in r92c_iq_calib_chain()
123 rx[0] = MS(rtwn_bb_read(sc, R92C_RX_POWER_IQK_BEFORE(chain)), in r92c_iq_calib_chain()
125 rx[1] = MS(rtwn_bb_read(sc, R92C_RX_POWER_IQK_AFTER(chain)), in r92c_iq_calib_chain()
127 if (rx[0] == 0x132 || rx[1] == 0x036) in r92c_iq_calib_chain()
135 uint16_t rx[2][2], struct r92c_iq_cal_reg_vals *vals) in r92c_iq_calib_run()
238 tx[chain], rx[chain]); in r92c_iq_calib_run()
245 rx[chain][0] = 0xff; in r92c_iq_calib_run()
246 rx[chain][1] = 0xff; in r92c_iq_calib_run()
251 rx[chain][0] = 0xff; in r92c_iq_calib_run()
252 rx[chain][1] = 0xff; in r92c_iq_calib_run()
[all …]
/src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrInfo.td82 FRI16<op, (outs CPU16Regs:$rx), (ins simm16:$imm8),
87 FRI16_ins_base<op, asmstr, "\t$rx, $imm8 \t# 16 bit inst", itin>;
91 FRI16<_op, (outs CPU16Regs:$rx), (ins pcrel16:$imm8, i32imm:$size),
92 !strconcat(asmstr, "\t$rx, $imm8\t# 16 bit inst"), [], itin>;
96 FRI16<op, (outs), (ins CPU16Regs:$rx, simm16:$imm8),
101 FRI16R_ins_base<op, asmstr, "\t$rx, $imm8 \t# 16 bit inst", itin>;
105 FRI16<_op, (outs CPU16Regs:$rx), (ins CPU16Regs:$rx_, simm16:$imm8),
106 !strconcat(asmstr, "\t$rx, $imm8\t# 16 bit inst"), [], itin> {
107 let Constraints = "$rx_ = $rx";
112 FRI16<_op, (outs), (ins CPU16Regs:$rx, brtarget:$imm8),
[all …]
H A DMips16InstrFormats.td21 // rx 3-bit source or destination register
114 // Format RI instruction class in Mips : <|opcode|rx|imm8|>
121 bits<3> rx;
126 let Inst{10-8} = rx;
131 // Format RR instruction class in Mips : <|opcode|rx|ry|funct|>
138 bits<3> rx;
145 let Inst{10-8} = rx;
171 bits<3> rx;
179 let Inst{10-8} = rx;
209 bits<3> rx;
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/src/sys/dev/mlx5/mlx5_accel/
H A Dmlx5_ipsec_fs.c528 struct mlx5e_ipsec_rx *rx; in rx_add_rule() local
532 rx = (attrs->family == AF_INET) ? ipsec->rx_ipv4 : ipsec->rx_ipv6; in rx_add_rule()
569 dest[0].ft = rx->ft.status; in rx_add_rule()
589 rule = mlx5_add_flow_rules(rx->ft.sa, spec, &flow_act, dest, 2); in rx_add_rule()
601 rule = mlx5_add_flow_rules(rx->ft.sa, spec, &flow_act, dest, 2); in rx_add_rule()
1380 struct mlx5e_ipsec_rx *rx; in rx_add_policy() local
1383 rx = (attrs->family == AF_INET) ? ipsec->rx_ipv4 : ipsec->rx_ipv6; in rx_add_policy()
1384 ft = rx->chains ? ipsec_chains_get_table(rx->chains, attrs->prio) : rx->ft.pol; in rx_add_policy()
1401 dest[dstn].counter_id = mlx5_fc_id(rx->fc->drop); in rx_add_policy()
1411 dest[dstn].ft = rx->ft.sa; in rx_add_policy()
[all …]
/src/sys/dev/eqos/
H A Dif_eqos.c330 sc->rx.desc_ring[index].des0 = htole32((uint32_t)paddr); in eqos_setup_rxdesc()
331 sc->rx.desc_ring[index].des1 = htole32((uint32_t)(paddr >> 32)); in eqos_setup_rxdesc()
332 sc->rx.desc_ring[index].des2 = htole32(0); in eqos_setup_rxdesc()
333 bus_dmamap_sync(sc->rx.desc_tag, sc->rx.desc_map, BUS_DMASYNC_PREWRITE); in eqos_setup_rxdesc()
334 sc->rx.desc_ring[index].des3 = in eqos_setup_rxdesc()
346 error = bus_dmamap_load_mbuf_sg(sc->rx.buf_tag, in eqos_setup_rxbuf()
347 sc->rx.buf_map[index].map, m, &seg, &nsegs, 0); in eqos_setup_rxbuf()
351 bus_dmamap_sync(sc->rx.buf_tag, sc->rx.buf_map[index].map, in eqos_setup_rxbuf()
354 sc->rx.buf_map[index].mbuf = m; in eqos_setup_rxbuf()
482 (uint32_t)(sc->rx.desc_ring_paddr >> 32)); in eqos_init_rings()
[all …]
/src/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a77965.dtsi537 dma-names = "tx", "rx", "tx", "rx";
554 dma-names = "tx", "rx", "tx", "rx";
571 dma-names = "tx", "rx", "tx", "rx";
587 dma-names = "tx", "rx";
603 dma-names = "tx", "rx";
619 dma-names = "tx", "rx";
635 dma-names = "tx", "rx";
652 dma-names = "tx", "rx";
668 dma-names = "tx", "rx", "tx", "rx";
686 dma-names = "tx", "rx", "tx", "rx";
[all …]
H A Dr8a774b1.dtsi501 dma-names = "tx", "rx", "tx", "rx";
518 dma-names = "tx", "rx", "tx", "rx";
535 dma-names = "tx", "rx", "tx", "rx";
551 dma-names = "tx", "rx";
567 dma-names = "tx", "rx";
583 dma-names = "tx", "rx";
599 dma-names = "tx", "rx";
616 dma-names = "tx", "rx";
632 dma-names = "tx", "rx", "tx", "rx";
650 dma-names = "tx", "rx", "tx", "rx";
[all …]
H A Dr8a77960.dtsi666 dma-names = "tx", "rx", "tx", "rx";
683 dma-names = "tx", "rx", "tx", "rx";
700 dma-names = "tx", "rx", "tx", "rx";
716 dma-names = "tx", "rx";
732 dma-names = "tx", "rx";
748 dma-names = "tx", "rx";
764 dma-names = "tx", "rx";
781 dma-names = "tx", "rx";
797 dma-names = "tx", "rx", "tx", "rx";
815 dma-names = "tx", "rx", "tx", "rx";
[all …]
/src/sys/arm/allwinner/
H A Dif_awg.c208 struct awg_rxring rx; member
476 uint32_t tx, rx; in awg_enable_mac() local
481 rx = RD4(sc, EMAC_RX_CTL_0); in awg_enable_mac()
484 rx |= RX_EN | CHECK_CRC; in awg_enable_mac()
487 rx &= ~(RX_EN | CHECK_CRC); in awg_enable_mac()
491 WR4(sc, EMAC_RX_CTL_0, rx); in awg_enable_mac()
733 sc->rx.desc_ring[index].addr = htole32((uint32_t)paddr); in awg_setup_rxdesc()
734 sc->rx.desc_ring[index].size = htole32(size); in awg_setup_rxdesc()
735 sc->rx.desc_ring[index].status = htole32(status); in awg_setup_rxdesc()
742 sc->rx.desc_ring[index].status = htole32(RX_DESC_CTL); in awg_reuse_rxdesc()
[all …]
/src/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a7793.dtsi592 dma-names = "tx", "rx", "tx", "rx";
609 dma-names = "tx", "rx", "tx", "rx";
626 dma-names = "tx", "rx", "tx", "rx";
705 dma-names = "tx", "rx", "tx", "rx";
723 dma-names = "tx", "rx", "tx", "rx";
738 dma-names = "tx", "rx", "tx", "rx";
753 dma-names = "tx", "rx", "tx", "rx";
768 dma-names = "tx", "rx", "tx", "rx";
783 dma-names = "tx", "rx", "tx", "rx";
798 dma-names = "tx", "rx", "tx", "rx";
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