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Searched refs:roce (Results 1 – 22 of 22) sorted by relevance

/src/sys/contrib/device-tree/Bindings/infiniband/
H A Dhisilicon-hns-roce.txt10 - compatible: Should contain "hisilicon,hns-roce-v1".
24 - interrupt-names:should be one of 34 irqs for roce device
25 - hns-roce-comp-0 ~ hns-roce-comp-31: 32 complete event irq
26 - hns-roce-async: 1 async event irq
27 - hns-roce-common: named common exception warning irq
30 compatible = "hisilicon,hns-roce-v1";
74 interrupt-names = "hns-roce-comp-0",
75 "hns-roce-comp-1",
76 "hns-roce-comp-2",
77 "hns-roce-comp-3",
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/src/sys/dev/mlx5/mlx5_lib/
H A Dmlx5_gid.c42 ida_init(&dev->roce.reserved_gids.ida); in mlx5_init_reserved_gids()
43 dev->roce.reserved_gids.start = tblsz; in mlx5_init_reserved_gids()
44 dev->roce.reserved_gids.count = 0; in mlx5_init_reserved_gids()
49 WARN_ON(!ida_is_empty(&dev->roce.reserved_gids.ida)); in mlx5_cleanup_reserved_gids()
50 dev->roce.reserved_gids.start = 0; in mlx5_cleanup_reserved_gids()
51 dev->roce.reserved_gids.count = 0; in mlx5_cleanup_reserved_gids()
52 ida_destroy(&dev->roce.reserved_gids.ida); in mlx5_cleanup_reserved_gids()
61 if (dev->roce.reserved_gids.start < count) { in mlx5_core_reserve_gids()
66 if (dev->roce.reserved_gids.count + count > MLX5_MAX_RESERVED_GIDS) { in mlx5_core_reserve_gids()
71 dev->roce.reserved_gids.start -= count; in mlx5_core_reserve_gids()
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/src/sys/dev/mlx5/mlx5_accel/
H A Dmlx5_ipsec_fs.c128 struct mlx5e_ipsec_tx_roce roce; member
157 struct mlx5e_ipsec_rx_roce roce; member
676 if (!tx->roce.ft) in tx_destroy_roce()
679 mlx5_del_flow_rules(&tx->roce.rule); in tx_destroy_roce()
680 mlx5_destroy_flow_group(tx->roce.g); in tx_destroy_roce()
681 mlx5_destroy_flow_table(tx->roce.ft); in tx_destroy_roce()
682 tx->roce.ft = NULL; in tx_destroy_roce()
717 rule = mlx5_add_flow_rules(tx->roce.ft, NULL, &flow_act, &dst, 1); in ipsec_tx_roce_rule_setup()
724 tx->roce.rule = rule; in ipsec_tx_roce_rule_setup()
739 if (!tx->roce.ns) in ipsec_tx_create_roce()
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/src/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhip07.dtsi1195 mbigen_dsa_roce: intc-roce {
1523 compatible = "hisilicon,hns-roce-v1";
1567 interrupt-names = "hns-roce-comp-0",
1568 "hns-roce-comp-1",
1569 "hns-roce-comp-2",
1570 "hns-roce-comp-3",
1571 "hns-roce-comp-4",
1572 "hns-roce-comp-5",
1573 "hns-roce-comp-6",
1574 "hns-roce-comp-7",
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/src/sys/dev/qlnx/qlnxe/
H A Decore_rdma.c665 if (params->roce.cq_mode == ECORE_RDMA_CQ_MODE_32_BITS) in ecore_rdma_init_devinfo()
833 rc = ecore_roce_dcqcn_cfg(p_hwfn, &params->roce.dcqcn_params, in ecore_rdma_start_fw()
845 p_hwfn, params->roce.ll2_handle); in ecore_rdma_start_fw()
846 p_ent->ramrod.roce_init_func.roce.ll2_queue_id = ll2_queue_id; in ecore_rdma_start_fw()
861 if (params->roce.cq_mode == ECORE_RDMA_CQ_MODE_16_BITS) in ecore_rdma_start_fw()
2435 OSAL_MEMSET(&info->roce.event_stats, 0, sizeof(info->roce.event_stats)); in ecore_rdma_query_stats()
2436 OSAL_MEMSET(&info->roce.dcqcn_rx_stats, 0,sizeof(info->roce.dcqcn_rx_stats)); in ecore_rdma_query_stats()
2437 OSAL_MEMSET(&info->roce.dcqcn_tx_stats, 0,sizeof(info->roce.dcqcn_tx_stats)); in ecore_rdma_query_stats()
2458 ecore_memcpy_from(p_hwfn, p_ptt, &info->roce.event_stats, addr, in ecore_rdma_query_stats()
2463 ecore_memcpy_from(p_hwfn, p_ptt, &info->roce.dcqcn_rx_stats, addr, in ecore_rdma_query_stats()
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H A Decore_roce.c121 if (!p_hwfn->p_rdma_info->roce.dcqcn_reaction_point) in ecore_roce_stop_rl()
151 p_hwfn->p_rdma_info->roce.dcqcn_enabled = 0; in ecore_roce_dcqcn_cfg()
156 p_ramrod->roce.cnp_send_timeout = params->cnp_send_timeout; in ecore_roce_dcqcn_cfg()
157 p_hwfn->p_rdma_info->roce.dcqcn_enabled = 1; in ecore_roce_dcqcn_cfg()
167 p_hwfn->p_rdma_info->roce.dcqcn_enabled = 1; in ecore_roce_dcqcn_cfg()
168 p_hwfn->p_rdma_info->roce.dcqcn_reaction_point = 1; in ecore_roce_dcqcn_cfg()
181 p_ramrod->roce.cnp_dscp = params->cnp_dscp; in ecore_roce_dcqcn_cfg()
182 p_ramrod->roce.cnp_vlan_priority = params->cnp_vlan_priority; in ecore_roce_dcqcn_cfg()
503 if (p_hwfn->p_rdma_info->roce.dcqcn_enabled) in ecore_roce_sp_create_responder()
661 if (p_hwfn->p_rdma_info->roce.dcqcn_enabled) in ecore_roce_sp_create_requester()
H A Decore_rdma.h134 struct ecore_roce_info roce; member
H A Decore_dcbx_api.h87 u8 roce; member
H A Decore_roce_api.h297 struct ecore_roce_params roce; member
H A Decore_dcbx.c511 p_prio->roce = ECORE_DCBX_INVALID_PRIORITY; in ecore_dcbx_get_priority_info()
518 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority; in ecore_dcbx_get_priority_info()
540 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe, in ecore_dcbx_get_priority_info()
H A Decore_rdma_api.h342 struct ecore_roce_params roce; member
H A Decore_hsi_roce.h333 struct roce_init_func_params roce; member
/src/sys/dev/mlx5/mlx5_ib/
H A Dmlx5_ib_main.c104 roce.nb); in mlx5_netdev_event()
109 write_lock(&ibdev->roce.netdev_lock); in mlx5_netdev_event()
112 ibdev->roce.netdev = (event == NETDEV_UNREGISTER) ? in mlx5_netdev_event()
114 write_unlock(&ibdev->roce.netdev_lock); in mlx5_netdev_event()
121 if ((upper == ndev || (!upper && ndev == ibdev->roce.netdev)) in mlx5_netdev_event()
149 read_lock(&ibdev->roce.netdev_lock); in mlx5_ib_get_netdev()
150 ndev = ibdev->roce.netdev; in mlx5_ib_get_netdev()
153 read_unlock(&ibdev->roce.netdev_lock); in mlx5_ib_get_netdev()
3105 if ((ll == IB_LINK_LAYER_INFINIBAND) || MLX5_CAP_GEN(dev->mdev, roce)) in mlx5_port_immutable()
3131 if (dev->roce.nb.notifier_call) { in mlx5_remove_roce_notifier()
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H A Dmlx5_ib.h751 struct mlx5_roce roce; member
/src/sys/dev/cxgbe/
H A Dt4_filter.c434 if (fs->val.roce || fs->mask.roce) in check_fspec_against_fconf_iconf()
476 fs->val.roce || fs->mask.roce || in check_fspec_against_fconf_iconf()
1009 if (tp->roce_shift >= 0 && fs->mask.roce) { in hashfilter_ntuple()
1010 *ftuple |= SFF(fs->val.roce, tp->roce_shift); in hashfilter_ntuple()
1022 if (fs->mask.ipsecidx || fs->mask.roce || fs->mask.synonly || in hashfilter_ntuple()
H A Dt4_ioctl.h207 uint32_t roce:1; member
/src/sys/dev/mlx5/mlx5_core/
H A Dmlx5_fw.c161 if (MLX5_CAP_GEN(dev, roce)) { in mlx5_query_hca_caps()
H A Dmlx5_main.c591 !MLX5_CAP_GEN(dev, roce)) in set_hca_ctrl()
/src/sys/dev/mlx5/
H A Ddriver.h756 } roce; member
H A Dmlx5_ifc.h1482 u8 roce[0x1]; member
/src/sys/dev/qlnx/qlnxr/
H A Dqlnxr_os.c781 in_params->roce.cq_mode = ECORE_RDMA_CQ_MODE_32_BITS; in qlnxr_init_hw()
/src/contrib/tzdata/
H A Deurope1007 # whereas the 1918 source "Oznámení o zavedení letního času v roce 1918"