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Searched refs:pic (Results 1 – 25 of 225) sorted by relevance

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/src/sys/contrib/device-tree/src/mips/loongson/
H A Dls7a-pch.dtsi13 pic: interrupt-controller@10000000 { label
14 compatible = "loongson,pch-pic-1.0";
18 loongson,pic-base-vec = <0>;
25 interrupt-parent = <&pic>;
33 interrupt-parent = <&pic>;
43 interrupt-parent = <&pic>;
53 interrupt-parent = <&pic>;
63 interrupt-parent = <&pic>;
89 interrupt-parent = <&pic>;
100 interrupt-parent = <&pic>;
[all …]
/src/sys/kern/
H A Dsubr_intr.c763 struct intr_pic *pic; local
771 SLIST_FOREACH(pic, &pic_list, pic_next) {
772 if ((pic->pic_flags & FLAG_TYPE_MASK) !=
777 if (xref == pic->pic_xref)
778 return (pic);
779 } else if (xref == 0 || pic->pic_xref == 0) {
780 if (dev == pic->pic_dev)
781 return (pic);
782 } else if (xref == pic->pic_xref && dev == pic->pic_dev)
783 return (pic);
[all …]
/src/sys/powerpc/powerpc/
H A Dintr_machdep.c94 device_t pic; member
107 struct pic { struct
118 static struct pic piclist[MAX_PICS]; argument
199 if (i != NULL && i->event != NULL && i->pic == root_pic) in smp_intr_init()
200 PIC_BIND(i->pic, i->intline, i->pi_cpuset, &i->priv); in smp_intr_init()
246 i->pic = NULL; in intr_lookup()
288 struct pic *p; in powerpc_map_irq()
302 i->pic = p->dev; in powerpc_map_irq()
305 if (i->pic == NULL) in powerpc_map_irq()
306 i->pic = root_pic; in powerpc_map_irq()
[all …]
/src/sys/contrib/device-tree/src/loongarch/
H A Dloongson-2k2000.dtsi148 pic: interrupt-controller@10000000 { label
149 compatible = "loongson,pch-pic-1.0";
153 loongson,pic-base-vec = <0>;
171 interrupt-parent = <&pic>;
181 interrupt-parent = <&pic>;
191 interrupt-parent = <&pic>;
201 interrupt-parent = <&pic>;
211 interrupt-parent = <&pic>;
221 interrupt-parent = <&pic>;
231 interrupt-parent = <&pic>;
[all …]
/src/sys/contrib/device-tree/Bindings/pci/
H A Dv3-v360epc-pci.txt39 interrupt-parent = <&pic>;
56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
57 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
58 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
59 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
61 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
62 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
63 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
64 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
66 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
[all …]
/src/sys/x86/x86/
H A Dintr_machdep.c89 static TAILQ_HEAD(pics_head, pic) pics;
108 static int intr_pic_registered(struct pic *pic);
126 intr_pic_registered(struct pic *pic) in intr_pic_registered() argument
128 struct pic *p; in intr_pic_registered()
131 if (p == pic) in intr_pic_registered()
144 intr_register_pic(struct pic *pic) in intr_register_pic() argument
149 if (intr_pic_registered(pic)) in intr_register_pic()
152 TAILQ_INSERT_TAIL(&pics, pic, pics); in intr_register_pic()
166 struct pic *pic; in intr_init_sources() local
205 TAILQ_FOREACH(pic, &pics, pics) { in intr_init_sources()
[all …]
/src/sys/contrib/device-tree/src/xtensa/
H A Dvirt.dts8 interrupt-parent = <&pic>;
37 pic: pic { label
38 compatible = "cdns,xtensa-pic";
64 0x0000 0x0 0x0 0x1 &pic 0x0 0x1
65 0x0800 0x0 0x0 0x1 &pic 0x1 0x1
66 0x1000 0x0 0x0 0x1 &pic 0x2 0x1
67 0x1800 0x0 0x0 0x1 &pic 0x3 0x1
H A Dcsp.dts8 interrupt-parent = <&pic>;
28 pic: pic { label
29 compatible = "cdns,xtensa-pic";
/src/sys/x86/include/
H A Dintr_machdep.h76 struct pic { struct
77 void (*pic_register_sources)(struct pic *); argument
85 void (*pic_suspend)(struct pic *); argument
86 void (*pic_resume)(struct pic *, bool suspend_cancelled); argument
91 TAILQ_ENTRY(pic) pics;
107 struct pic *is_pic;
149 int intr_register_pic(struct pic *pic);
/src/sys/x86/isa/
H A Datpic.c124 struct pic at_pic;
140 static void atpic_register_sources(struct pic *pic);
148 static void atpic_resume(struct pic *pic, bool suspend_cancelled);
153 static void i8259_init(struct atpic *pic, int slave);
211 atpic_register_sources(struct pic *pic) in atpic_register_sources() argument
213 struct atpic *ap = (struct atpic *)pic; in atpic_register_sources()
336 atpic_resume(struct pic *pic, bool suspend_cancelled) in atpic_resume() argument
338 struct atpic *ap = (struct atpic *)pic; in atpic_resume()
413 i8259_init(struct atpic *pic, int slave) in i8259_init() argument
419 outb(pic->at_ioaddr, ICW1_RESET | ICW1_IC4); in i8259_init()
[all …]
/src/sys/contrib/device-tree/src/arm/arm/
H A Dintegratorap.dts149 pic: pic@14000000 { label
161 interrupt-parent = <&pic>;
178 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
179 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
180 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
181 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
183 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
184 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
185 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
186 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
[all …]
/src/share/doc/psd/18.gprof/
H A DMakefile4 EXTRA= postp1.pic postp2.pic postp3.pic pres1.pic pres2.pic
/src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dopencores,or1k-pic.txt5 - compatible : should be "opencores,or1k-pic-level" for variants with
6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
7 edge triggered interrupt lines or "opencores,or1200-pic" for machines
10 "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic",
20 compatible = "opencores,or1k-pic-level";
H A Dti,c64x+megamod-pic.txt13 - compatible: Should be "ti,c64x+core-pic";
26 compatible = "ti,c64x+core-pic";
45 - compatible: "ti,c64x+megamod-pic"
55 - ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
68 interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
75 compatible = "ti,c64x+megamod-pic";
89 compatible = "ti,c64x+megamod-pic";
95 ti,c64x+megamod-pic-mux = < 0 0 0 0
H A Dcdns,xtensa-pic.txt4 - compatible: Should be "cdns,xtensa-pic".
17 pic: pic {
18 compatible = "cdns,xtensa-pic";
/src/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/cpm/
H A Dpic.txt4 - fsl,cpm1-pic
6 - fsl,pq1-pic
7 - fsl,cpm2-pic
17 compatible = "mpc8272-pic", "fsl,cpm2-pic";
/src/sys/contrib/device-tree/src/mips/netlogic/
H A Dxlp_fvp.dts27 interrupt-parent = <&pic>;
37 interrupt-parent = <&pic>;
48 interrupt-parent = <&pic>;
59 interrupt-parent = <&pic>;
72 pic: pic@4000 { label
73 compatible = "netlogic,xlp-pic";
122 interrupt-parent = <&pic>;
H A Dxlp_svp.dts27 interrupt-parent = <&pic>;
37 interrupt-parent = <&pic>;
48 interrupt-parent = <&pic>;
59 interrupt-parent = <&pic>;
72 pic: pic@4000 { label
73 compatible = "netlogic,xlp-pic";
122 interrupt-parent = <&pic>;
H A Dxlp_evp.dts27 interrupt-parent = <&pic>;
37 interrupt-parent = <&pic>;
48 interrupt-parent = <&pic>;
59 interrupt-parent = <&pic>;
72 pic: pic@4000 { label
73 compatible = "netlogic,xlp-pic";
122 interrupt-parent = <&pic>;
H A Dxlp_gvp.dts27 interrupt-parent = <&pic>;
30 pic: pic@110000 { label
31 compatible = "netlogic,xlp-pic";
80 interrupt-parent = <&pic>;
H A Dxlp_rvp.dts27 interrupt-parent = <&pic>;
30 pic: pic@110000 { label
31 compatible = "netlogic,xlp-pic";
80 interrupt-parent = <&pic>;
/src/sys/contrib/device-tree/src/openrisc/
H A Dor1ksim.dts7 interrupt-parent = <&pic>;
38 pic: pic { label
39 compatible = "opencores,or1k-pic";
H A Dor1klitex.dts13 interrupt-parent = <&pic>;
38 pic: pic { label
39 compatible = "opencores,or1k-pic";
H A Dsimple_smp.dts6 interrupt-parent = <&pic>;
50 pic: pic { label
51 compatible = "opencores,or1k-pic-level";
/src/share/doc/psd/20.ipctut/
H A DMakefile4 EXTRA= dgramread.c dgramsend.c fig2.pic fig3.pic fig8.pic pipe.c \

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