xref: /src/sys/dev/irdma/irdma_main.h (revision 5b7aa6c7bc9db19e8bd34a5b7892fb5df2a3068b)
1 /*-
2  * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
3  *
4  * Copyright (c) 2015 - 2026 Intel Corporation
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenFabrics.org BSD license below:
11  *
12  *   Redistribution and use in source and binary forms, with or
13  *   without modification, are permitted provided that the following
14  *   conditions are met:
15  *
16  *    - Redistributions of source code must retain the above
17  *	copyright notice, this list of conditions and the following
18  *	disclaimer.
19  *
20  *    - Redistributions in binary form must reproduce the above
21  *	copyright notice, this list of conditions and the following
22  *	disclaimer in the documentation and/or other materials
23  *	provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #ifndef IRDMA_MAIN_H
36 #define IRDMA_MAIN_H
37 
38 #include <linux/in.h>
39 #include <netinet/ip6.h>
40 #include <netinet/udp.h>
41 #include <netinet/tcp.h>
42 #include <sys/rman.h>
43 #include <sys/socket.h>
44 #include <netinet/if_ether.h>
45 #include <linux/slab.h>
46 #include <linux/rculist.h>
47 #include <rdma/uverbs_ioctl.h>
48 #include <rdma/ib_smi.h>
49 #include <rdma/ib_verbs.h>
50 #include <rdma/ib_pack.h>
51 #include <rdma/rdma_cm.h>
52 #include <rdma/iw_cm.h>
53 #include <rdma/ib_user_verbs.h>
54 #include <rdma/ib_umem.h>
55 #include <rdma/ib_cache.h>
56 #include "osdep.h"
57 #include "irdma_defs.h"
58 #include "irdma_hmc.h"
59 #include "irdma_type.h"
60 #include "irdma_ws.h"
61 #include "irdma_protos.h"
62 #include "irdma_pble.h"
63 #include "irdma_cm.h"
64 #include "fbsd_kcompat.h"
65 #include "irdma-abi.h"
66 #include "irdma_verbs.h"
67 #include "irdma_user.h"
68 #include "irdma_puda.h"
69 
70 extern struct list_head irdma_handlers;
71 extern spinlock_t irdma_handler_lock;
72 extern bool irdma_upload_context;
73 
74 #define IRDMA_FW_VER_DEFAULT	2
75 #define IRDMA_HW_VER	        2
76 
77 #define IRDMA_ARP_ADD_UPDATE	1
78 #define IRDMA_ARP_ADD		IRDMA_ARP_ADD_UPDATE
79 #define IRDMA_ARP_DELETE	2
80 #define IRDMA_ARP_RESOLVE	3
81 
82 #define IRDMA_MACIP_ADD		1
83 #define IRDMA_MACIP_DELETE	2
84 
85 #define IW_CCQ_SIZE		(IRDMA_CQP_SW_SQSIZE_MAX + 2)
86 #define IW_CEQ_SIZE		2048
87 #define IW_AEQ_SIZE		2048
88 
89 #define RX_BUF_SIZE	(1536 + 8)
90 #define IW_REG0_SIZE	(4 * 1024)
91 #define IW_TX_TIMEOUT	(6 * HZ)
92 #define IW_FIRST_QPN	1
93 
94 #define IW_SW_CONTEXT_ALIGN	1024
95 
96 #define MAX_DPC_ITERATIONS	128
97 
98 #define IRDMA_EVENT_TIMEOUT_MS		5000
99 #define IRDMA_VCHNL_EVENT_TIMEOUT_MS	10000
100 #define IRDMA_RETRY_PRINT_MS		5000
101 #define IRDMA_RST_TIMEOUT_HZ		4
102 
103 #define	IRDMA_NO_QSET	0xffff
104 
105 #define IW_CFG_FPM_QP_COUNT		32768
106 #define IRDMA_MAX_PAGES_PER_FMR		262144
107 #define IRDMA_MIN_PAGES_PER_FMR		1
108 #define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED	2
109 #define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED	3
110 
111 #define IRDMA_Q_TYPE_PE_AEQ	0x80
112 #define IRDMA_REM_ENDPOINT_TRK_QPID	3
113 
114 #define IRDMA_DRV_OPT_ENA_MPA_VER_0		0x00000001
115 #define IRDMA_DRV_OPT_DISABLE_MPA_CRC		0x00000002
116 #define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE	0x00000004
117 #define IRDMA_DRV_OPT_DISABLE_INTF		0x00000008
118 #define IRDMA_DRV_OPT_ENA_MSI			0x00000010
119 #define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT		0x00000020
120 #define IRDMA_DRV_OPT_NO_INLINE_DATA		0x00000080
121 #define IRDMA_DRV_OPT_DISABLE_INT_MOD		0x00000100
122 #define IRDMA_DRV_OPT_DISABLE_VIRT_WQ		0x00000200
123 #define IRDMA_DRV_OPT_ENA_PAU			0x00000400
124 #define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP		0x00000800
125 
126 #define IW_HMC_OBJ_TYPE_NUM	ARRAY_SIZE(iw_hmc_obj_types)
127 #define IRDMA_ROCE_CWND_DEFAULT			0x400
128 #define IRDMA_ROCE_ACKCREDS_DEFAULT		0x1E
129 
130 #define IRDMA_FLUSH_SQ		BIT(0)
131 #define IRDMA_FLUSH_RQ		BIT(1)
132 #define IRDMA_REFLUSH		BIT(2)
133 #define IRDMA_FLUSH_WAIT	BIT(3)
134 
135 #define IRDMA_IRQ_NAME_STR_LEN 64
136 
137 enum init_completion_state {
138 	INVALID_STATE = 0,
139 	INITIAL_STATE,
140 	CQP_CREATED,
141 	HMC_OBJS_CREATED,
142 	HW_RSRC_INITIALIZED,
143 	CCQ_CREATED,
144 	CEQ0_CREATED, /* Last state of probe */
145 	ILQ_CREATED,
146 	IEQ_CREATED,
147 	REM_ENDPOINT_TRK_CREATED,
148 	CEQS_CREATED,
149 	PBLE_CHUNK_MEM,
150 	AEQ_CREATED,
151 	IP_ADDR_REGISTERED,  /* Last state of open */
152 };
153 
154 struct ae_desc {
155 	u16 id;
156 	const char *desc;
157 };
158 
159 struct irdma_rsrc_limits {
160 	u32 qplimit;
161 	u32 mrlimit;
162 	u32 cqlimit;
163 };
164 
165 struct irdma_cqp_err_info {
166 	u16 maj;
167 	u16 min;
168 	const char *desc;
169 };
170 
171 struct irdma_cqp_compl_info {
172 	u32 op_ret_val;
173 	u16 maj_err_code;
174 	u16 min_err_code;
175 	bool error;
176 	u8 op_code;
177 };
178 
179 struct irdma_cqp_request {
180 	struct cqp_cmds_info info;
181 	wait_queue_head_t waitq;
182 	struct list_head list;
183 	atomic_t refcnt;
184 	void (*callback_fcn)(struct irdma_cqp_request *cqp_request);
185 	void *param;
186 	struct irdma_cqp_compl_info compl_info;
187 	u8 request_done; /* READ/WRITE_ONCE macros operate on it */
188 	bool waiting:1;
189 	bool dynamic:1;
190 };
191 
192 struct irdma_cqp {
193 	struct irdma_sc_cqp sc_cqp;
194 	spinlock_t req_lock; /* protect CQP request list */
195 	spinlock_t compl_lock; /* protect CQP completion processing */
196 	wait_queue_head_t waitq;
197 	wait_queue_head_t remove_wq;
198 	struct irdma_dma_mem sq;
199 	struct irdma_dma_mem host_ctx;
200 	u64 *scratch_array;
201 	struct irdma_cqp_request *cqp_requests;
202 	struct list_head cqp_avail_reqs;
203 	struct list_head cqp_pending_reqs;
204 };
205 
206 struct irdma_ccq {
207 	struct irdma_sc_cq sc_cq;
208 	struct irdma_dma_mem mem_cq;
209 	struct irdma_dma_mem shadow_area;
210 };
211 
212 struct irdma_ceq {
213 	struct irdma_sc_ceq sc_ceq;
214 	struct irdma_dma_mem mem;
215 	u32 irq;
216 	u32 msix_idx;
217 	struct irdma_pci_f *rf;
218 	struct tasklet_struct dpc_tasklet;
219 	spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */
220 };
221 
222 struct irdma_aeq {
223 	struct irdma_sc_aeq sc_aeq;
224 	struct irdma_dma_mem mem;
225 	struct irdma_pble_alloc palloc;
226 	bool virtual_map;
227 };
228 
229 struct irdma_arp_entry {
230 	u32 ip_addr[4];
231 	u8 mac_addr[ETHER_ADDR_LEN];
232 	atomic_t refcnt;
233 	bool delete_pending:1;
234 };
235 
236 struct irdma_msix_vector {
237 	u32 idx;
238 	u32 irq;
239 	u32 cpu_affinity;
240 	u16 ceq_id;
241 	char name[IRDMA_IRQ_NAME_STR_LEN];
242 	struct resource *res;
243 	void  *tag;
244 };
245 
246 struct irdma_mc_table_info {
247 	u32 mgn;
248 	u32 dest_ip[4];
249 	bool lan_fwd:1;
250 	bool ipv4_valid:1;
251 };
252 
253 struct mc_table_list {
254 	struct list_head list;
255 	struct irdma_mc_table_info mc_info;
256 	struct irdma_mcast_grp_info mc_grp_ctx;
257 };
258 
259 struct irdma_qv_info {
260 	u32 v_idx; /* msix_vector */
261 	u16 ceq_idx;
262 	u16 aeq_idx;
263 	u8 itr_idx;
264 };
265 
266 struct irdma_qvlist_info {
267 	u32 num_vectors;
268 	struct irdma_qv_info qv_info[1];
269 };
270 
271 struct irdma_gen_ops {
272 	void (*request_reset)(struct irdma_pci_f *rf);
273 	int (*register_qset)(struct irdma_sc_vsi *vsi,
274 			     struct irdma_ws_node *tc_node);
275 	void (*unregister_qset)(struct irdma_sc_vsi *vsi,
276 				struct irdma_ws_node *tc_node);
277 };
278 
279 struct irdma_pci_f {
280 	bool reset:1;
281 	bool rsrc_created:1;
282 	bool msix_shared:1;
283 	bool ftype:1;
284 	u8 rsrc_profile;
285 	u8 *hmc_info_mem;
286 	u8 *mem_rsrc;
287 	u8 rdma_ver;
288 	u8 rst_to;
289 	/* Not used in SRIOV VF mode */
290 	u8 pf_id;
291 	enum irdma_protocol_used protocol_used;
292 	bool en_rem_endpoint_trk:1;
293 	bool dcqcn_ena:1;
294 	u32 sd_type;
295 	u32 msix_count;
296 	u32 max_mr;
297 	u32 max_qp;
298 	u32 max_cq;
299 	u32 max_ah;
300 	u32 next_ah;
301 	u32 max_mcg;
302 	u32 next_mcg;
303 	u32 max_pd;
304 	u32 next_qp;
305 	u32 next_cq;
306 	u32 next_pd;
307 	u32 max_mr_size;
308 	u32 max_cqe;
309 	u32 mr_stagmask;
310 	u32 used_pds;
311 	u32 used_cqs;
312 	u32 used_mrs;
313 	u32 used_qps;
314 	u32 arp_table_size;
315 	u32 next_arp_index;
316 	u32 ceqs_count;
317 	u32 next_ws_node_id;
318 	u32 max_ws_node_id;
319 	u32 limits_sel;
320 	u8 timer_slots;
321 	unsigned long *allocated_ws_nodes;
322 	unsigned long *allocated_qps;
323 	unsigned long *allocated_cqs;
324 	unsigned long *allocated_mrs;
325 	unsigned long *allocated_pds;
326 	unsigned long *allocated_mcgs;
327 	unsigned long *allocated_ahs;
328 	unsigned long *allocated_arps;
329 	enum init_completion_state init_state;
330 	struct irdma_sc_dev sc_dev;
331 	struct irdma_dev_ctx dev_ctx;
332 	struct irdma_tunable_info tun_info;
333 	eventhandler_tag irdma_ifaddr_event;
334 	struct irdma_handler *hdl;
335 	struct pci_dev *pcidev;
336 	struct ice_rdma_peer *peer_info;
337 	struct irdma_hw hw;
338 	struct irdma_cqp cqp;
339 	struct irdma_ccq ccq;
340 	struct irdma_aeq aeq;
341 	struct irdma_ceq *ceqlist;
342 	struct irdma_hmc_pble_rsrc *pble_rsrc;
343 	struct irdma_arp_entry *arp_table;
344 	spinlock_t arp_lock; /*protect ARP table access*/
345 	spinlock_t rsrc_lock; /* protect HW resource array access */
346 	spinlock_t qptable_lock; /*protect QP table access*/
347 	spinlock_t cqtable_lock; /*protect CQ table access*/
348 	struct irdma_qp **qp_table;
349 	struct irdma_cq **cq_table;
350 	spinlock_t qh_list_lock; /* protect mc_qht_list */
351 	struct mc_table_list mc_qht_list;
352 	struct irdma_msix_vector *iw_msixtbl;
353 	struct irdma_qvlist_info *iw_qvlist;
354 	struct tasklet_struct dpc_tasklet;
355 	struct msix_entry msix_info;
356 	struct irdma_dma_mem obj_mem;
357 	struct irdma_dma_mem obj_next;
358 	struct workqueue_struct *cqp_cmpl_wq;
359 	struct work_struct cqp_cmpl_work;
360 	struct irdma_sc_vsi default_vsi;
361 	void *back_fcn;
362 	struct irdma_gen_ops gen_ops;
363 	void (*check_fc)(struct irdma_sc_vsi *vsi, struct irdma_sc_qp *sc_qp);
364 	struct irdma_dcqcn_cc_params dcqcn_params;
365 	struct irdma_device *iwdev;
366 	struct delayed_work dwork_cqp_poll;
367 	u32 chk_stag;
368 };
369 
370 struct irdma_ae_info {
371 	spinlock_t info_lock;
372 	atomic_t ae_cnt;
373 	u32 retry_cnt;
374 	unsigned long retry_delay;
375 };
376 
377 struct irdma_device {
378 	struct ib_device ibdev;
379 	struct irdma_pci_f *rf;
380 	if_t netdev;
381 	struct notifier_block nb_netdevice_event;
382 	struct irdma_handler *hdl;
383 	struct workqueue_struct *cleanup_wq;
384 	struct irdma_sc_vsi vsi;
385 	struct irdma_cm_core cm_core;
386 	struct irdma_ae_info ae_info;
387 	u32 roce_cwnd;
388 	u32 roce_ackcreds;
389 	u32 vendor_id;
390 	u32 vendor_part_id;
391 	u32 rcv_wnd;
392 	u16 mac_ip_table_idx;
393 	u16 vsi_num;
394 	u8 rcv_wscale;
395 	u8 iw_status;
396 	u8 roce_rtomin;
397 	u8 rd_fence_rate;
398 	bool override_rcv_wnd:1;
399 	bool override_cwnd:1;
400 	bool override_ackcreds:1;
401 	bool override_ooo:1;
402 	bool override_rd_fence_rate:1;
403 	bool override_rtomin:1;
404 	bool push_mode:1;
405 	bool roce_mode:1;
406 	bool roce_dcqcn_en:1;
407 	bool dcb_vlan_mode:1;
408 	bool iw_ooo:1;
409 	enum init_completion_state init_state;
410 	wait_queue_head_t suspend_wq;
411 };
412 
413 struct irdma_handler {
414 	struct list_head list;
415 	struct irdma_device *iwdev;
416 	struct task deferred_task;
417 	struct taskqueue *deferred_tq;
418 	bool shared_res_created;
419 };
420 
to_iwdev(struct ib_device * ibdev)421 static inline struct irdma_device *to_iwdev(struct ib_device *ibdev)
422 {
423 	return container_of(ibdev, struct irdma_device, ibdev);
424 }
425 
to_ucontext(struct ib_ucontext * ibucontext)426 static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
427 {
428 	return container_of(ibucontext, struct irdma_ucontext, ibucontext);
429 }
430 
431 static inline struct irdma_user_mmap_entry *
to_irdma_mmap_entry(struct rdma_user_mmap_entry * rdma_entry)432 to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry)
433 {
434 	return container_of(rdma_entry, struct irdma_user_mmap_entry,
435 			    rdma_entry);
436 }
437 
to_iwpd(struct ib_pd * ibpd)438 static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd)
439 {
440 	return container_of(ibpd, struct irdma_pd, ibpd);
441 }
442 
to_iwah(struct ib_ah * ibah)443 static inline struct irdma_ah *to_iwah(struct ib_ah *ibah)
444 {
445 	return container_of(ibah, struct irdma_ah, ibah);
446 }
447 
to_iwmr(struct ib_mr * ibmr)448 static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr)
449 {
450 	return container_of(ibmr, struct irdma_mr, ibmr);
451 }
452 
to_iwmw(struct ib_mw * ibmw)453 static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw)
454 {
455 	return container_of(ibmw, struct irdma_mr, ibmw);
456 }
457 
to_iwcq(struct ib_cq * ibcq)458 static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq)
459 {
460 	return container_of(ibcq, struct irdma_cq, ibcq);
461 }
462 
to_iwqp(struct ib_qp * ibqp)463 static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp)
464 {
465 	return container_of(ibqp, struct irdma_qp, ibqp);
466 }
467 
dev_to_rf(struct irdma_sc_dev * dev)468 static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev)
469 {
470 	return container_of(dev, struct irdma_pci_f, sc_dev);
471 }
472 
473 /**
474  * irdma_alloc_resource - allocate a resource
475  * @iwdev: device pointer
476  * @resource_array: resource bit array:
477  * @max_resources: maximum resource number
478  * @req_resources_num: Allocated resource number
479  * @next: next free id
480  **/
irdma_alloc_rsrc(struct irdma_pci_f * rf,unsigned long * rsrc_array,u32 max_rsrc,u32 * req_rsrc_num,u32 * next)481 static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf,
482 				   unsigned long *rsrc_array, u32 max_rsrc,
483 				   u32 *req_rsrc_num, u32 *next)
484 {
485 	u32 rsrc_num;
486 	unsigned long flags;
487 
488 	spin_lock_irqsave(&rf->rsrc_lock, flags);
489 	rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next);
490 	if (rsrc_num >= max_rsrc) {
491 		rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc);
492 		if (rsrc_num >= max_rsrc) {
493 			spin_unlock_irqrestore(&rf->rsrc_lock, flags);
494 			irdma_debug(&rf->sc_dev, IRDMA_DEBUG_ERR,
495 				    "resource [%d] allocation failed\n",
496 				    rsrc_num);
497 			return -EOVERFLOW;
498 		}
499 	}
500 	__set_bit(rsrc_num, rsrc_array);
501 	*next = rsrc_num + 1;
502 	if (*next == max_rsrc)
503 		*next = 0;
504 	*req_rsrc_num = rsrc_num;
505 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
506 
507 	return 0;
508 }
509 
510 /**
511  * irdma_free_resource - free a resource
512  * @iwdev: device pointer
513  * @resource_array: resource array for the resource_num
514  * @resource_num: resource number to free
515  **/
irdma_free_rsrc(struct irdma_pci_f * rf,unsigned long * rsrc_array,u32 rsrc_num)516 static inline void irdma_free_rsrc(struct irdma_pci_f *rf,
517 				   unsigned long *rsrc_array, u32 rsrc_num)
518 {
519 	unsigned long flags;
520 
521 	spin_lock_irqsave(&rf->rsrc_lock, flags);
522 	__clear_bit(rsrc_num, rsrc_array);
523 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
524 }
525 
526 int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
527 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
528 int irdma_rt_init_hw(struct irdma_device *iwdev,
529 		     struct irdma_l2params *l2params);
530 void irdma_rt_deinit_hw(struct irdma_device *iwdev);
531 void irdma_qp_add_ref(struct ib_qp *ibqp);
532 void irdma_qp_rem_ref(struct ib_qp *ibqp);
533 void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp);
534 struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn);
535 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
536 void irdma_arp_cqp_op(struct irdma_pci_f *rf, u16 arp_index,
537 		      const unsigned char *mac_addr, u32 action);
538 void irdma_manage_arp_cache(struct irdma_pci_f *rf, const unsigned char *mac_addr,
539 			    u32 *ip_addr, u32 action);
540 struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port);
541 void irdma_del_apbvt(struct irdma_device *iwdev,
542 		     struct irdma_apbvt_entry *entry);
543 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
544 							  bool wait);
545 void irdma_free_cqp_request(struct irdma_cqp *cqp,
546 			    struct irdma_cqp_request *cqp_request);
547 void irdma_put_cqp_request(struct irdma_cqp *cqp,
548 			   struct irdma_cqp_request *cqp_request);
549 int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx);
550 int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx);
551 void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx);
552 const char *irdma_get_ae_desc(u16 ae_id);
553 
554 u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
555 void irdma_port_ibevent(struct irdma_device *iwdev);
556 void irdma_cm_disconn(struct irdma_qp *qp);
557 
558 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
559 			u16 maj_err_code, u16 min_err_code);
560 int irdma_handle_cqp_op(struct irdma_pci_f *rf,
561 			struct irdma_cqp_request *cqp_request);
562 
563 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
564 		    struct ib_udata *udata);
565 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
566 			 int attr_mask, struct ib_udata *udata);
567 void irdma_cq_add_ref(struct ib_cq *ibcq);
568 void irdma_cq_rem_ref(struct ib_cq *ibcq);
569 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
570 
571 void irdma_chk_free_stag(struct irdma_pci_f *rf);
572 void cqp_poll_worker(struct work_struct *work);
573 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
574 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
575 		       struct irdma_modify_qp_info *info, bool wait);
576 int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
577 int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
578 		       enum irdma_quad_entry_type etype,
579 		       enum irdma_quad_hash_manage_type mtype, void *cmnode,
580 		       bool wait);
581 int irdma_add_qhash_wait_no_lock(struct irdma_device *iwdev, struct irdma_cm_info *cminfo);
582 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
583 void irdma_cm_ilq_cmpl_handler(struct irdma_sc_vsi *vsi, void *bufp);
584 void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
585 int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
586 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
587 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
588 			 u8 term_len);
589 int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
590 int irdma_send_reset(struct irdma_cm_node *cm_node);
591 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
592 				      u16 rem_port, u32 *rem_addr, u16 loc_port,
593 				      u32 *loc_addr, u16 vlan_id);
594 int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
595 			struct irdma_qp_flush_info *info, bool wait);
596 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
597 		  struct irdma_gen_ae_info *info, bool wait);
598 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
599 void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
600 u16 irdma_get_vlan_ipv4(struct iw_cm_id *cm_id, u32 *addr);
601 void irdma_get_vlan_mac_ipv6(struct iw_cm_id *cm_id, u32 *addr, u16 *vlan_id,
602 			     u8 *mac);
603 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
604 				int acc, u64 *iova_start, bool dma_mr);
605 int irdma_upload_qp_context(struct irdma_pci_f *rf, u32 qpn,
606 			    u8 qp_type, bool freeze, bool raw);
607 void irdma_del_hmc_objects(struct irdma_sc_dev *dev,
608 			   struct irdma_hmc_info *hmc_info, bool privileged,
609 			   bool reset, enum irdma_vers vers);
610 void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
611 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
612 		    bool wait,
613 		    void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
614 		    void *cb_param);
615 void irdma_udqp_qs_worker(struct work_struct *work);
616 int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event,
617 			  void *ptr);
618 void irdma_unregister_notifiers(struct irdma_device *iwdev);
619 int irdma_register_notifiers(struct irdma_device *iwdev);
620 void irdma_set_rf_user_cfg_params(struct irdma_pci_f *rf);
621 void irdma_add_ip(struct irdma_device *iwdev);
622 void irdma_add_handler(struct irdma_handler *hdl);
623 void irdma_del_handler(struct irdma_handler *hdl);
624 void cqp_compl_worker(struct work_struct *work);
625 void irdma_cleanup_dead_qps(struct irdma_sc_vsi *vsi);
626 #endif /* IRDMA_MAIN_H */
627