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Searched refs:mdc (Results 1 – 25 of 43) sorted by relevance

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/src/sys/contrib/device-tree/Bindings/dma/
H A Dimg-mdc-dma.txt4 - compatible: Must be "img,pistachio-mdc-dma".
28 mdc: dma-controller@18143000 {
29 compatible = "img,pistachio-mdc-dma";
54 dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
/src/sys/contrib/device-tree/Bindings/arm/marvell/
H A Dcp110-system-controller.txt92 …i2sdo_spdifo), ge0(rxd2), tdm(drx), ptp(clk), mss_i2c(sck), uart0(txd), sata1(present_act), ge(mdc)
93 …0(rxd1), tdm(dtx), mss_uart(rxd), ptp(pclk_out), i2c1(sck), uart1(rxd), sata0(present_act), xg(mdc)
95 …, au(i2sbclk), ge0(rxctl), tdm(rstn), mss_uart(rxd), uart1(cts), pcie0(clkreq), uart3(rxd), ge(mdc)
119 …pi1(csn0), mss_gpio5, ge0(rxd2), spi0(csn5), pcie2(clkreq), ptp(pulse), ge(mdc), sata1(present_act…
122 mpp31 31 gpio, dev(a2), mss_gpio4, pcie(rstoutn), ge(mdc)
125 …, sdio(pwr11), mss_spi(mosi), tdm(dtx), au(i2slrclk), sdio(wr_protect), ge(mdc), pcie0(clkreq), ms…
127 …i2c1(sck), ptp(clk), synce1(clk), au(i2sbclk), sata0(present_act), xg(mdc), ge(mdc), pcie2(clkreq)…
128 …(sck), ptp(pclk_out), tdm(intn), mss_i2c(sck), sata1(present_act), ge(mdc), xg(mdc), pcie1(clkreq)…
132 …s_pwr), mss_i2c(sck), au(i2slrclk), ptp(pulse), spi0(mosi), uart1(rxd), ge(mdc), sata1(present_act…
133 …tect), synce2(clk), au(i2smclk), mss_uart(txd), spi0(miso), uart1(cts), xg(mdc), sata0(present_act…
[all …]
/src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-98dx3236-pinctrl.txt18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
45 mpp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1)
H A Dmarvell,armada-39x-pinctrl.txt22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
25 mpp7 7 gpio, dev(ad9), xsmi(mdc)
38 mpp20 20 gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc)
H A Dmarvell,armada-38x-pinctrl.txt22 mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
33 mpp15 15 gpio, ge0(rxd3), ge(mdc slave), pcie0(rstout), spi0(mosi)
74 mpp56 56 gpio, ua1(rts), ge(mdc), dram(deccerr), spi1(mosi), ua1(txd)
H A Dqcom,ipq4019-pinctrl.txt62 mdc, mdio, pcie, pmu, prng_rosc, qpic, rgmii, rmii, sdio, smart0, smart1,
H A Dmarvell,armada-375-pinctrl.txt53 mpp37 37 gpio, pcie0(clkreq), tdm(int), ge(mdc)
/src/sys/contrib/device-tree/src/mips/img/
H A Dpistachio.dtsi120 dmas = <&mdc 30 0xffffffff 0>;
136 dmas = <&mdc 23 0xffffffff 0>;
156 dmas = <&mdc 16 0xffffffff 0>;
173 dmas = <&mdc 14 0xffffffff 0>;
192 dmas = <&mdc 15 0xffffffff 0>;
217 dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
232 dmas = <&mdc 1 0xffffffff 0>, <&mdc 2 0xffffffff 0>;
817 mdc: dma-controller@18143000 { label
818 compatible = "img,pistachio-mdc-dma";
882 dmas = <&mdc 8 0xffffffff 0>;
/src/crypto/openssl/crypto/pkcs7/
H A Dpk7_doit.c776 EVP_MD_CTX *mdc, *ctx_tmp; in PKCS7_dataFinal() local
868 btmp = PKCS7_find_digest(&mdc, btmp, j); in PKCS7_dataFinal()
876 if (!EVP_MD_CTX_copy_ex(ctx_tmp, mdc)) in PKCS7_dataFinal()
908 if (!PKCS7_find_digest(&mdc, bio, in PKCS7_dataFinal()
911 if (!EVP_DigestFinal_ex(mdc, md_data, &md_len)) in PKCS7_dataFinal()
1067 EVP_MD_CTX *mdc_tmp, *mdc; in PKCS7_signatureVerify() local
1099 BIO_get_md_ctx(btmp, &mdc); in PKCS7_signatureVerify()
1100 if (mdc == NULL) { in PKCS7_signatureVerify()
1104 if (EVP_MD_CTX_get_type(mdc) == md_type) in PKCS7_signatureVerify()
1110 if (EVP_MD_get_pkey_type(EVP_MD_CTX_get0_md(mdc)) == md_type) in PKCS7_signatureVerify()
[all …]
/src/sys/contrib/device-tree/Bindings/spi/
H A Dspi-img-spfi.txt34 dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
/src/sys/contrib/device-tree/Bindings/net/dsa/
H A Drealtek-smi.txt23 - mdc-gpios: GPIO line for the MDC clock line.
71 mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
162 mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
/src/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-ipq4018-jalapeno.dts21 mdc-pins {
23 function = "mdc";
H A Dqcom-ipq4018-ap120c-ac.dtsi45 mdc-pins {
47 function = "mdc";
/src/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A Dnetwork.txt31 fsl,mdc-pin : pin of port C controlling mdio clock
42 fsl,mdc-pin = <13>;
/src/sys/contrib/device-tree/Bindings/sound/
H A Dimg,spdif-in.txt36 dmas = <&mdc 15 0xffffffff 0>;
H A Dimg,parallel-out.txt36 dmas = <&mdc 16 0xffffffff 0>;
H A Dimg,spdif-out.txt36 dmas = <&mdc 14 0xffffffff 0>;
H A Dimg,i2s-in.txt41 dmas = <&mdc 30 0xffffffff 0>;
H A Dimg,i2s-out.txt42 dmas = <&mdc 23 0xffffffff 0>;
/src/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm47094-asus-rt-ac88u.dts22 mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
/src/sys/contrib/device-tree/src/arm64/qcom/
H A Dqcs404-evb-4000.dts49 mdc-pins {
H A Dsa8540p-ride.dts510 mdc-pins {
540 mdc-pins {
/src/sys/contrib/device-tree/src/riscv/thead/
H A Dth1520-lichee-module-4a.dtsi178 mdc-pins {
H A Dth1520-beaglev-ahead.dts170 mdc-pins {
/src/sys/contrib/device-tree/src/arm/st/
H A Dstih407-pinctrl.dtsi197 * switch where the mdio/mdc have been used for managing the SMI
225 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
233 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
249 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
270 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;

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