| /src/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | PredicateExpander.cpp | 89 assert(Reg->isSubClassOf("Register") && "Expected a register Record!"); in expandCheckRegOperand() 312 if (Rec->isSubClassOf("MCOpcodeSwitchStatement")) { in expandStatement() 318 if (Rec->isSubClassOf("MCReturnStatement")) { in expandStatement() 328 if (Rec->isSubClassOf("MCTrue")) { in expandPredicate() 334 if (Rec->isSubClassOf("MCFalse")) { in expandPredicate() 340 if (Rec->isSubClassOf("CheckNot")) { in expandPredicate() 347 if (Rec->isSubClassOf("CheckIsRegOperand")) in expandPredicate() 350 if (Rec->isSubClassOf("CheckIsVRegOperand")) in expandPredicate() 353 if (Rec->isSubClassOf("CheckIsImmOperand")) in expandPredicate() 356 if (Rec->isSubClassOf("CheckRegOperand")) in expandPredicate() [all …]
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| H A D | CodeGenInstAlias.cpp | 48 if (InstOpRec->isSubClassOf("RegisterOperand")) in tryAliasOpMatch() 51 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand")) in tryAliasOpMatch() 54 if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) { in tryAliasOpMatch() 55 if (!InstOpRec->isSubClassOf("RegisterClass")) in tryAliasOpMatch() 66 if (ADI && ADI->getDef()->isSubClassOf("Register")) { in tryAliasOpMatch() 67 if (InstOpRec->isSubClassOf("OptionalDefOperand")) { in tryAliasOpMatch() 74 if (!InstOpRec->isSubClassOf("RegisterClass")) in tryAliasOpMatch() 109 if (hasSubOps || !InstOpRec->isSubClassOf("Operand")) in tryAliasOpMatch() 121 if (hasSubOps || !InstOpRec->isSubClassOf("Operand")) in tryAliasOpMatch() 137 if (InstOpRec->isSubClassOf("Operand") && ADI && in tryAliasOpMatch() [all …]
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| H A D | InfoByHwMode.cpp | 38 if (R->isSubClassOf("PtrValueType")) in ValueTypeByHwMode() 43 if (R->isSubClassOf("PtrValueType")) in ValueTypeByHwMode() 108 if (!Rec->isSubClassOf("ValueType")) in getValueTypeByHwMode() 111 assert(Rec->isSubClassOf("ValueType") && in getValueTypeByHwMode() 113 if (Rec->isSubClassOf("HwModeSelect")) in getValueTypeByHwMode() 129 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const { in isSubClassOf() function in RegSizeInfo 158 bool RegSizeInfoByHwMode::isSubClassOf(const RegSizeInfoByHwMode &I) const { in isSubClassOf() function in RegSizeInfoByHwMode 160 return get(M0).isSubClassOf(I.get(M0)); in isSubClassOf() 204 assert(P.second && P.second->isSubClassOf("InstructionEncoding") && in EncodingInfoByHwMode()
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| H A D | CodeGenDAGPatterns.cpp | 1490 if (!Def->isSubClassOf("Predicate")) { in getPredicateRecords() 1535 if (R->isSubClassOf("SDTCisVT")) { in SDTypeConstraint() 1541 } else if (R->isSubClassOf("SDTCisPtrTy")) { in SDTypeConstraint() 1543 } else if (R->isSubClassOf("SDTCisInt")) { in SDTypeConstraint() 1545 } else if (R->isSubClassOf("SDTCisFP")) { in SDTypeConstraint() 1547 } else if (R->isSubClassOf("SDTCisVec")) { in SDTypeConstraint() 1549 } else if (R->isSubClassOf("SDTCisSameAs")) { in SDTypeConstraint() 1552 } else if (R->isSubClassOf("SDTCisVTSmallerThanOp")) { in SDTypeConstraint() 1556 } else if (R->isSubClassOf("SDTCisOpSmallerThanOp")) { in SDTypeConstraint() 1560 } else if (R->isSubClassOf("SDTCisEltOfVec")) { in SDTypeConstraint() [all …]
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| H A D | CodeGenSchedule.cpp | 497 if (Queue->isSubClassOf("LoadQueue")) { in collectLoadStoreQueueInfo() 507 if (Queue->isSubClassOf("StoreQueue")) { in collectLoadStoreQueueInfo() 571 if (ModelKey->isSubClassOf("SchedMachineModel")) { in addProcModel() 591 if (RWDef->isSubClassOf("WriteSequence")) { in scanSchedRW() 595 } else if (RWDef->isSubClassOf("SchedVariant")) { in scanSchedRW() 624 if (RW->isSubClassOf("SchedWrite")) in collectSchedRW() 627 assert(RW->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); in collectSchedRW() 638 if (RWDef->isSubClassOf("SchedWrite")) in collectSchedRW() 641 assert(RWDef->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); in collectSchedRW() 652 if (RWDef->isSubClassOf("SchedWrite")) in collectSchedRW() [all …]
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| H A D | CodeGenInstruction.cpp | 85 if (Rec->isSubClassOf("RegisterOperand")) { in CGIOperandList() 90 } else if (Rec->isSubClassOf("Operand")) { in CGIOperandList() 110 if (Rec->isSubClassOf("PredicateOp")) in CGIOperandList() 112 else if (Rec->isSubClassOf("OptionalDefOperand")) in CGIOperandList() 119 } else if (Rec->isSubClassOf("RegisterClass")) { in CGIOperandList() 121 } else if (!Rec->isSubClassOf("PointerLikeRegClass") && in CGIOperandList() 122 !Rec->isSubClassOf("unknown_class")) { in CGIOperandList() 525 assert(FirstImplicitDef->isSubClassOf("Register")); in HasOneImplicitDefWithKnownVT() 590 return Constraint->getDef()->isSubClassOf("TypedOperand") && in isOperandImpl()
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| /src/contrib/llvm-project/llvm/utils/TableGen/Basic/ |
| H A D | CodeGenIntrinsics.cpp | 133 assert(Property->isSubClassOf("IntrinsicProperty") && in CodeGenIntrinsic() 209 else if (R->isSubClassOf("NoCapture")) { in setProperty() 212 } else if (R->isSubClassOf("NoAlias")) { in setProperty() 215 } else if (R->isSubClassOf("NoUndef")) { in setProperty() 218 } else if (R->isSubClassOf("NonNull")) { in setProperty() 221 } else if (R->isSubClassOf("Returned")) { in setProperty() 224 } else if (R->isSubClassOf("ReadOnly")) { in setProperty() 227 } else if (R->isSubClassOf("WriteOnly")) { in setProperty() 230 } else if (R->isSubClassOf("ReadNone")) { in setProperty() 233 } else if (R->isSubClassOf("ImmArg")) { in setProperty() [all …]
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| /src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CallingConvEmitter.cpp | 129 if (Action->isSubClassOf("CCPredicateAction")) { in EmitAction() 132 if (Action->isSubClassOf("CCIfType")) { in EmitAction() 141 } else if (Action->isSubClassOf("CCIf")) { in EmitAction() 152 if (Action->isSubClassOf("CCDelegateTo")) { in EmitAction() 158 } else if (Action->isSubClassOf("CCAssignToReg") || in EmitAction() 159 Action->isSubClassOf("CCAssignToRegAndStack")) { in EmitAction() 188 if (Action->isSubClassOf("CCAssignToRegAndStack")) { in EmitAction() 212 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) { in EmitAction() 252 } else if (Action->isSubClassOf("CCAssignToStack")) { in EmitAction() 278 } else if (Action->isSubClassOf("CCAssignToStackWithShadow")) { in EmitAction() [all …]
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| H A D | DAGISelMatcherGen.cpp | 233 if (LeafRec->isSubClassOf("ValueType")) { in EmitLeafMatchCode() 242 LeafRec->isSubClassOf("RegisterClass") || in EmitLeafMatchCode() 243 LeafRec->isSubClassOf("RegisterOperand") || in EmitLeafMatchCode() 244 LeafRec->isSubClassOf("PointerLikeRegClass") || in EmitLeafMatchCode() 245 LeafRec->isSubClassOf("SubRegIndex") || in EmitLeafMatchCode() 252 if (LeafRec->isSubClassOf("Register")) { in EmitLeafMatchCode() 259 if (LeafRec->isSubClassOf("CondCode")) in EmitLeafMatchCode() 262 if (LeafRec->isSubClassOf("ComplexPattern")) { in EmitLeafMatchCode() 305 if (N.getOperator()->isSubClassOf("ComplexPattern")) { in EmitOperatorMatchCode() 677 if (Def->isSubClassOf("Register")) { in EmitResultLeafAsOperand() [all …]
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| H A D | MacroFusionPredicatorEmitter.cpp | 146 if (Predicate->isSubClassOf("WildcardPred")) { in emitFirstPredicate() 151 } else if (Predicate->isSubClassOf("OneUsePred")) { in emitFirstPredicate() 158 } else if (Predicate->isSubClassOf("FusionPredicateWithMCInstPredicate")) { in emitFirstPredicate() 179 if (Predicate->isSubClassOf("FusionPredicateWithMCInstPredicate")) { in emitSecondPredicate() 189 } else if (Predicate->isSubClassOf("SameReg")) { in emitSecondPredicate() 230 if (Predicate->isSubClassOf("FusionPredicateWithCode")) in emitBothPredicate() 232 else if (Predicate->isSubClassOf("BothFusionPredicateWithMCInstPredicate")) { in emitBothPredicate() 235 } else if (Predicate->isSubClassOf("TieReg")) { in emitBothPredicate()
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| H A D | GlobalISelEmitter.cpp | 172 if (Operator->isSubClassOf("SDNode")) in explainOperator() 175 if (Operator->isSubClassOf("Intrinsic")) in explainOperator() 178 if (Operator->isSubClassOf("ComplexPattern")) in explainOperator() 183 if (Operator->isSubClassOf("SDNodeXForm")) in explainOperator() 272 if (VDefInit->getDef()->isSubClassOf("RegisterOperand")) in getInitValueAsRegClass() 274 if (VDefInit->getDef()->isSubClassOf("RegisterClass")) in getInitValueAsRegClass() 294 assert(Dst.getOperator()->isSubClassOf("Instruction")); in getInstResultType() 856 if (!CCDef || !CCDef->isSubClassOf("CondCode")) in createAndImportSelDAGMatcher() 950 if (ChildRec->isSubClassOf("Register")) { in getSrcChildName() 968 SrcChild.getOperator()->isSubClassOf("ComplexPattern")) { in importChildMatcher() [all …]
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| H A D | CompressInstEmitter.cpp | 152 assert(Reg->isSubClassOf("Register") && "Reg record should be a Register"); in validateRegister() 153 assert(RegClass->isSubClassOf("RegisterClass") && in validateRegister() 170 if (DagOpType->isSubClassOf("RegisterClass") && in validateTypes() 171 InstOpType->isSubClassOf("RegisterClass")) { in validateTypes() 178 if (DagOpType->isSubClassOf("RegisterClass") || in validateTypes() 179 InstOpType->isSubClassOf("RegisterClass")) in validateTypes() 219 if (DI->getDef()->isSubClassOf("Register")) { in addDagOperandMapping() 247 if (Inst.Operands[I].Rec->isSubClassOf("RegisterClass")) in addDagOperandMapping() 510 !cast<DefInit>(Arg)->getDef()->isSubClassOf("SubtargetFeature")) in getReqFeatures() 716 if (Source.Operands[OpNo].Rec->isSubClassOf("RegisterClass")) in emitCompressInstEmitter() [all …]
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| H A D | InstrInfoEmitter.cpp | 157 if (OpR->isSubClassOf("RegisterOperand")) in GetOperandInfo() 159 if (OpR->isSubClassOf("RegisterClass")) in GetOperandInfo() 161 else if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo() 171 if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo() 176 if (Op.Rec->isSubClassOf("PredicateOp")) in GetOperandInfo() 181 if (Op.Rec->isSubClassOf("OptionalDefOperand")) in GetOperandInfo() 186 if (Op.Rec->isSubClassOf("BranchTargetOperand")) in GetOperandInfo() 451 if ((OpR->isSubClassOf("Operand") || in emitOperandTypeMappings() 452 OpR->isSubClassOf("RegisterOperand") || in emitOperandTypeMappings() 453 OpR->isSubClassOf("RegisterClass")) && in emitOperandTypeMappings() [all …]
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| H A D | ARMTargetDefEmitter.cpp | 29 assert(Rec->isSubClassOf("SubtargetFeature") && in CollectImpliedFeatures() 46 if (Feat->isSubClassOf("ExtensionWithMArch") && !DefaultExts.count(Feat)) in CheckFeatureTree() 298 auto IsArch = [](Record *F) { return F->isSubClassOf("Architecture64"); }; in EmitARMTargetDef() 325 if (E->isSubClassOf("Extension")) { in EmitARMTargetDef()
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| H A D | FastISelEmitter.cpp | 279 if (OpLeafRec->isSubClassOf("RegisterOperand")) in initialize() 281 if (OpLeafRec->isSubClassOf("RegisterClass")) in initialize() 283 else if (OpLeafRec->isSubClassOf("Register")) in initialize() 285 else if (OpLeafRec->isSubClassOf("ValueType")) { in initialize() 441 if (!OpLeafRec->isSubClassOf("Register")) in PhyRegForNode() 465 if (!Op->isSubClassOf("Instruction")) in collectPatterns() 484 if (ChildOp.getOperator()->isSubClassOf("Instruction")) { in collectPatterns() 498 if (Op0Rec->isSubClassOf("RegisterOperand")) in collectPatterns() 500 if (!Op0Rec->isSubClassOf("RegisterClass")) in collectPatterns()
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| H A D | SubtargetEmitter.cpp | 685 if (!PRDef->isSubClassOf("ProcResGroup")) in EmitProcessorResourceSubUnits() 846 if (PRDef->isSubClassOf("ProcResGroup")) { in EmitProcessorResources() 888 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes")) in FindWriteResources() 908 if (AliasDef && AliasDef->isSubClassOf("SchedWriteRes")) in FindWriteResources() 914 if (!WR->isSubClassOf("WriteRes")) in FindWriteResources() 946 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance() 967 if (AliasDef && AliasDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance() 973 if (!RA->isSubClassOf("ReadAdvance")) in FindReadAdvance() 1009 if (PRDef->isSubClassOf("ProcResGroup")) in ExpandProcResources() 1016 if (SubDef->isSubClassOf("ProcResGroup")) { in ExpandProcResources() [all …]
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| H A D | DAGISelEmitter.cpp | 51 if (Op->isSubClassOf("Instruction")) { in getResultPatternCost() 71 if (Op->isSubClassOf("Instruction")) { in getResultPatternSize()
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| /src/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | ClangSyntaxEmitter.cpp | 55 assert(N.Record->isSubClassOf("Alternatives") || in Hierarchy() 56 N.Record->isSubClassOf("External") || N.Derived.empty()); in Hierarchy() 57 assert(!N.Record->isSubClassOf("Alternatives") || !N.Derived.empty()); in Hierarchy() 113 if (R.isSubClassOf("Optional")) { in SyntaxConstraint() 115 } else if (R.isSubClassOf("AnyToken")) { in SyntaxConstraint() 117 } else if (R.isSubClassOf("NodeType")) { in SyntaxConstraint() 202 if (N.Record->isSubClassOf("External")) in EmitClangSyntaxNodeClasses() 216 if (N.Record->isSubClassOf("Sequence")) { in EmitClangSyntaxNodeClasses() 219 assert(C->isSubClassOf("Role")); in EmitClangSyntaxNodeClasses()
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| H A D | ClangBuiltinsEmitter.cpp | 220 if (Builtin->isSubClassOf("LibBuiltin")) { in PrintAttributes() 238 if (Attr->isSubClassOf("IndexedAttribute")) in PrintAttributes() 316 if (Builtin->isSubClassOf("Template")) { in EmitBuiltin() 329 if (Builtin->isSubClassOf("AtomicBuiltin")) { in EmitBuiltin() 331 } else if (Builtin->isSubClassOf("LangBuiltin")) { in EmitBuiltin() 333 } else if (Builtin->isSubClassOf("TargetBuiltin")) { in EmitBuiltin() 335 } else if (Builtin->isSubClassOf("LibBuiltin")) { in EmitBuiltin() 378 if (Builtin->isSubClassOf("AtomicBuiltin")) in EmitClangBuiltins()
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| H A D | ClangTypeNodesEmitter.cpp | 155 if (type.isSubClassOf(AlwaysDependentClassName)) in emitNodeInvocations() 157 if (type.isSubClassOf(NeverCanonicalClassName)) in emitNodeInvocations() 159 if (type.isSubClassOf(NeverCanonicalUnlessDependentClassName)) in emitNodeInvocations() 188 if (!type.isSubClassOf(LeafTypeClassName)) continue; in emitLeafNodeInvocations()
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| H A D | ASTTableGen.h | 110 bool isSubClassOf(llvm::StringRef className) const { in isSubClassOf() function 111 return get()->isSubClassOf(className); in isSubClassOf() 116 return (isSubClassOf(NodeClass::getTableGenNodeClassName()) in getAs() 283 if (isSubClassOf(ArrayTypeClassName)) in getArrayElementType() 290 if (isSubClassOf(OptionalTypeClassName)) in getOptionalElementType() 297 if (isSubClassOf(SubclassPropertyTypeClassName)) in getSuperclassType() 311 return isSubClassOf(EnumPropertyTypeClassName); in isEnum()
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| H A D | MveEmitter.cpp | 1072 if (R->isSubClassOf("Immediate")) in getType() 1074 else if (R->isSubClassOf("unpromoted")) in getType() 1079 if (R->isSubClassOf("PrimitiveType")) in getType() 1081 if (R->isSubClassOf("ComplexType")) in getType() 1092 if (!Op->isSubClassOf("ComplexTypeOp")) in getType() 1118 if (Op->isSubClassOf("CTO_Tuple")) { in getType() 1124 if (Op->isSubClassOf("CTO_Pointer")) { in getType() 1140 if (Op->isSubClassOf("CTO_ScaleSize")) { in getType() 1175 } else if (Op->isSubClassOf("Type")) { in getCodeForDag() 1215 if (!TypeRec->isSubClassOf("Type")) in getCodeForDag() [all …]
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| H A D | ClangOpenCLBuiltinEmitter.cpp | 470 if (T->isSubClassOf("GenericType")) { in VerifySignature() 1043 bool isGenType = Type->isSubClassOf("GenericType"); in getTypeLists() 1051 if (Type->isSubClassOf("PointerType") || Type->isSubClassOf("ConstType") || in getTypeLists() 1052 Type->isSubClassOf("VolatileType")) { in getTypeLists() 1055 if (PossibleGenType && PossibleGenType->isSubClassOf("GenericType")) { in getTypeLists()
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| /src/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
| H A D | CombinerUtils.h | 37 if (OpI->getDef()->isSubClassOf(Cls)) in getDefOfSubClass() 64 if (OpI->getDef()->isSubClassOf(Cls)) in getDagWithOperatorOfSubClass()
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| H A D | PatternParser.cpp | 32 if (Def.isSubClassOf("GICombineRule")) in print() 34 else if (Def.isSubClassOf(PatFrag::ClassName)) in print() 279 if (!R->isSubClassOf(MIFlagsEnumClassName)) { in parseInstructionPatternMIFlags() 341 if (!Def->isSubClassOf(PatFrag::ClassName)) in parsePatFragImpl()
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