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Searched refs:isOutOfOrder (Results 1 – 10 of 10) sorted by relevance

/src/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DRetireControlUnit.cpp24 AvailableEntries(SM.isOutOfOrder() ? SM.MicroOpBufferSize : 0), in RetireControlUnit()
26 assert(SM.isOutOfOrder() && in RetireControlUnit()
/src/contrib/llvm-project/llvm/lib/MCA/
H A DContext.cpp36 if (!SM.isOutOfOrder()) in createDefaultPipeline()
/src/contrib/llvm-project/llvm/tools/llvm-mca/
H A DPipelinePrinter.cpp53 if (!SM.isOutOfOrder()) in getJSONSimulationParameters()
H A Dllvm-mca.cpp422 bool IsOutOfOrder = STI->getSchedModel().isOutOfOrder(); in main()
/src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSchedule.h347 bool isOutOfOrder() const { return MicroOpBufferSize > 1; } in isOutOfOrder() function
/src/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSchedule.cpp276 if (!SchedModel.isOutOfOrder()) in computeOutputLatency()
/src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp1584 return (!SchedModel.hasInstrSchedModel() || SchedModel.isOutOfOrder()) in getMachineCombinerTraceStrategy()
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp3659 !ST->getSchedModel().isOutOfOrder()) { in getUnrollingPreferences()
/src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1636 PredictableSelectIsExpensive = Subtarget->getSchedModel().isOutOfOrder(); in ARMTargetLowering()
/src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2585 PredictableSelectIsExpensive = Subtarget.getSchedModel().isOutOfOrder(); in X86TargetLowering()