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Searched refs:isAllActivePredicate (Results 1 – 4 of 4) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp1014 static bool isAllActivePredicate(Value *Pred) { in isAllActivePredicate() function
1071 if (isAllActivePredicate(OpPredicate)) in instCombineSVESel()
1484 if (isAllActivePredicate(Pred)) { in instCombineSVELD1()
1503 if (isAllActivePredicate(Pred)) { in instCombineSVEST1()
2040 AbsPred != Pred && !isAllActivePredicate(AbsPred)) in instCombineSVESrshl()
H A DAArch64ISelLowering.h986 bool isAllActivePredicate(SelectionDAG &DAG, SDValue N) const;
H A DAArch64ISelDAGToDAG.cpp4505 if (!TLI->isAllActivePredicate(*CurDAG, N0.getOperand(0)) || in trySelectXAR()
4506 !TLI->isAllActivePredicate(*CurDAG, N1.getOperand(0))) in trySelectXAR()
7330 return TLI->isAllActivePredicate(*CurDAG, N); in SelectAllActivePredicate()
H A DAArch64ISelLowering.cpp13642 static bool isAllActivePredicate(SelectionDAG &DAG, SDValue N) { in isAllActivePredicate() function
13733 if (!isAllActivePredicate(DAG, Shift.getOperand(0))) in tryLowerToSLI()
18946 if (isAllActivePredicate(DAG, N->getOperand(0))) in performSVEAndCombine()
18948 if (isAllActivePredicate(DAG, N->getOperand(1))) in performSVEAndCombine()
21167 if (isAllActivePredicate(DAG, Pg)) { in convertMergedOpToPredOp()
24040 if (isAllActivePredicate(DAG, Pred)) in performSetccMergeZeroCombine()
24209 if (isAllActivePredicate(DAG, N0)) in performVSelectCombine()
27685 if (isAllActivePredicate(DAG, Pg) && OpVT == MVT::nxv16i1) in LowerPredReductionToSVE()
28377 bool AArch64TargetLowering::isAllActivePredicate(SelectionDAG &DAG, in isAllActivePredicate() function in AArch64TargetLowering
28379 return ::isAllActivePredicate(DAG, N); in isAllActivePredicate()