Home
last modified time | relevance | path

Searched refs:hasVGPRs (Results 1 – 2 of 2) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h199 return hasSGPRs(RC) && !hasVGPRs(RC) && !hasAGPRs(RC); in isSGPRClass()
211 return hasVGPRs(RC) && !hasAGPRs(RC) && !hasSGPRs(RC); in isVGPRClass()
216 return hasAGPRs(RC) && !hasVGPRs(RC) && !hasSGPRs(RC); in isAGPRClass()
221 return hasVGPRs(RC) && hasAGPRs(RC) && !hasSGPRs(RC); in isVectorSuperClass()
226 return hasVGPRs(RC) && hasSGPRs(RC) && !hasAGPRs(RC); in isVSSuperClass()
230 static bool hasVGPRs(const TargetRegisterClass *RC) { in hasVGPRs() function
246 return hasVGPRs(RC) || hasAGPRs(RC); in hasVectorRegisters()
H A DSIInstrInfo.cpp1067 else if (RI.hasVGPRs(SrcRC) || in copyPhysReg()
1072 } else if (RI.hasVGPRs(RC) && RI.isAGPRClass(SrcRC)) { in copyPhysReg()
1074 } else if ((Size % 64 == 0) && RI.hasVGPRs(RC) && in copyPhysReg()
2341 if (RI.hasVGPRs(EltRC)) { in expandPostRAPseudo()
3238 return RI.hasVGPRs(RC) && NumInsts <= 6; in canInsertSelect()
4783 if (!MO.isReg() || !RI.hasVGPRs(RI.getRegClassForReg(MRI, MO.getReg()))) { in verifyInstruction()
6645 if (RI.hasVGPRs(DstRC)) { in legalizeOperands()