Home
last modified time | relevance | path

Searched refs:gi_irq (Results 1 – 3 of 3) sorted by relevance

/src/sys/arm64/arm64/
H A Dgic_v3.c181 uint32_t gi_irq; member
362 sc->gic_irqs[irq].gi_irq = irq; in gic_v3_attach()
641 intr_ipi_dispatch(sgi_to_ipi[gi->gi_irq]); in arm_gic_v3_intr()
649 gic_icc_write(EOIR1, gi->gi_irq); in arm_gic_v3_intr()
653 gic_icc_write(EOIR1, gi->gi_irq); in arm_gic_v3_intr()
748 *irqp = gi->gi_irq; in gic_map_msi()
857 u_int irq = gi->gi_irq; in gic_v3_setup_intr_periph()
915 if (gi->gi_irq != irq || pol == INTR_POLARITY_CONFORM || in gic_v3_setup_intr()
974 irq = gi->gi_irq; in gic_v3_disable_intr()
996 u_int irq = gi->gi_irq; in gic_v3_enable_intr_periph()
[all …]
/src/sys/arm/arm/
H A Dgic.c112 uint32_t gi_irq; member
258 irqs[irq].gi_irq = irq; in arm_gic_register_isrcs()
601 intr_ipi_dispatch(sgi_to_ipi[gi->gi_irq]); in arm_gic_intr()
769 *irqp = gi->gi_irq; in gic_map_msi()
881 gi->gi_irq != irq) in arm_gic_setup_intr()
922 gic_config(sc, gi->gi_irq, gi->gi_trig, gi->gi_pol); in arm_gic_setup_intr()
946 arm_irq_memory_barrier(gi->gi_irq); in arm_gic_enable_intr()
947 gic_irq_unmask(sc, gi->gi_irq); in arm_gic_enable_intr()
956 gic_irq_mask(sc, gi->gi_irq); in arm_gic_disable_intr()
966 gic_c_write_4(sc, GICC_EOIR, gi->gi_irq); in arm_gic_pre_ithread()
[all …]
/src/sys/arm/freescale/imx/
H A Dimx_gpio.c109 u_int gi_irq; member
310 CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << gi->gi_irq)); in gpio_pic_teardown_intr()
311 WRITE4(sc, IMX_GPIO_ISR_REG, (1U << gi->gi_irq)); in gpio_pic_teardown_intr()
337 if (gi->gi_irq != irq) in gpio_pic_setup_intr()
402 irq = ((struct gpio_irqsrc *)isrc)->gi_irq; in gpio_pic_disable_intr()
419 irq = ((struct gpio_irqsrc *)isrc)->gi_irq; in gpio_pic_enable_intr()
433 irq = ((struct gpio_irqsrc *)isrc)->gi_irq; in gpio_pic_post_filter()
447 irq = ((struct gpio_irqsrc *)isrc)->gi_irq; in gpio_pic_post_ithread()
499 sc->gpio_pic_irqsrc[irq].gi_irq = irq; in gpio_pic_register_isrcs()