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Searched refs:getRepRegClassFor (Results 1 – 6 of 6) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.h60 const TargetRegisterClass *getRepRegClassFor(MVT VT) const override;
H A DMipsSEISelLowering.cpp306 MipsSETargetLowering::getRepRegClassFor(MVT VT) const { in getRepRegClassFor() function in MipsSETargetLowering
310 return TargetLowering::getRepRegClassFor(VT); in getRepRegClassFor()
/src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp350 RegClass = TLI->getRepRegClassFor(VT)->getID(); in GetCostForDef()
2129 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in MayReduceRegPressure()
2160 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in RegPressureDiff()
2175 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in RegPressureDiff()
2283 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in unscheduledNode()
2295 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in unscheduledNode()
2313 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in unscheduledNode()
2332 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in unscheduledNode()
/src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h806 const TargetRegisterClass *getRepRegClassFor(MVT VT) const override;
H A DSystemZISelLowering.cpp6255 assert(DAG.getTargetLoweringInfo().getRepRegClassFor(MVT::f128) == in expandBitCastI128ToF128()
6279 assert(DAG.getTargetLoweringInfo().getRepRegClassFor(MVT::f128) == in expandBitCastF128ToI128()
9659 SystemZTargetLowering::getRepRegClassFor(MVT VT) const { in getRepRegClassFor() function in SystemZTargetLowering
9662 return TargetLowering::getRepRegClassFor(VT); in getRepRegClassFor()
/src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1048 virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const { in getRepRegClassFor() function