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Searched refs:getRegister (Results 1 – 25 of 97) sorted by relevance

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/src/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DAsmPrinterDwarf.cpp218 OutStreamer->emitCFIDefCfa(Inst.getRegister(), Inst.getOffset(), Loc); in emitCFIInstruction()
221 OutStreamer->emitCFIDefCfaRegister(Inst.getRegister(), Loc); in emitCFIInstruction()
224 OutStreamer->emitCFILLVMDefAspaceCfa(Inst.getRegister(), Inst.getOffset(), in emitCFIInstruction()
228 OutStreamer->emitCFIOffset(Inst.getRegister(), Inst.getOffset(), Loc); in emitCFIInstruction()
231 OutStreamer->emitCFIRegister(Inst.getRegister(), Inst.getRegister2(), Loc); in emitCFIInstruction()
240 OutStreamer->emitCFISameValue(Inst.getRegister(), Loc); in emitCFIInstruction()
250 OutStreamer->emitCFIRestore(Inst.getRegister(), Loc); in emitCFIInstruction()
253 OutStreamer->emitCFIUndefined(Inst.getRegister(), Loc); in emitCFIInstruction()
/src/contrib/llvm-project/libunwind/src/
H A DUnwindCursor.hpp588 _msContext.Rax = r.getRegister(UNW_X86_64_RAX); in UnwindCursor()
589 _msContext.Rcx = r.getRegister(UNW_X86_64_RCX); in UnwindCursor()
590 _msContext.Rdx = r.getRegister(UNW_X86_64_RDX); in UnwindCursor()
591 _msContext.Rbx = r.getRegister(UNW_X86_64_RBX); in UnwindCursor()
592 _msContext.Rsp = r.getRegister(UNW_X86_64_RSP); in UnwindCursor()
593 _msContext.Rbp = r.getRegister(UNW_X86_64_RBP); in UnwindCursor()
594 _msContext.Rsi = r.getRegister(UNW_X86_64_RSI); in UnwindCursor()
595 _msContext.Rdi = r.getRegister(UNW_X86_64_RDI); in UnwindCursor()
596 _msContext.R8 = r.getRegister(UNW_X86_64_R8); in UnwindCursor()
597 _msContext.R9 = r.getRegister(UNW_X86_64_R9); in UnwindCursor()
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H A DRegisters.hpp64 uint32_t getRegister(int num) const;
141 inline uint32_t Registers_x86::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_x86
282 uint64_t getRegister(int num) const;
369 inline uint64_t Registers_x86_64::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_x86_64
601 uint32_t getRegister(int num) const;
727 inline uint32_t Registers_ppc::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_ppc
1173 uint64_t getRegister(int num) const;
1293 inline uint64_t Registers_ppc64::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_ppc64
1831 uint64_t getRegister(int num) const;
1903 inline uint64_t Registers_arm64::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_arm64
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H A DDwarfInstructions.hpp68 return (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) + in getCFA()
96 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value); in getSavedRegister()
103 return (pint_t)addressSpace.getRegister(evaluateExpression( in getSavedRegister()
111 return registers.getRegister((int)savedReg.value); in getSavedRegister()
343 pint_t sp = newRegisters.getRegister(UNW_REG_SP); in stepWithDwarf()
803 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
810 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
849 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
858 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
/src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp119 Reg = CurDAG->getRegister(ARM::CPSR, MVT::i32); in SelectCMOVPred()
883 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode2OffsetImmPre()
902 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode2OffsetImm()
936 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3()
952 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3()
981 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3Offset()
1100 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode6Offset()
1652 CurDAG->getRegister(0, MVT::i32), Chain }; in tryARMIndexedLoad()
1662 CurDAG->getRegister(0, MVT::i32), Chain }; in tryARMIndexedLoad()
1693 CurDAG->getRegister(0, MVT::i32), Chain }; in tryT1IndexedLoad()
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/src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp172 AMDGPU::VGPR_32RegClass.getRegister(ST.getMaxNumVGPRs(F) - 1); in SIMachineFunctionInfo()
196 return ArgInfo.PrivateSegmentBuffer.getRegister(); in addPrivateSegmentBuffer()
203 return ArgInfo.DispatchPtr.getRegister(); in addDispatchPtr()
210 return ArgInfo.QueuePtr.getRegister(); in addQueuePtr()
218 return ArgInfo.KernargSegmentPtr.getRegister(); in addKernargSegmentPtr()
225 return ArgInfo.DispatchID.getRegister(); in addDispatchID()
232 return ArgInfo.FlatScratchInit.getRegister(); in addFlatScratchInit()
238 return ArgInfo.PrivateSegmentSize.getRegister(); in addPrivateSegmentSize()
245 return ArgInfo.ImplicitBufferPtr.getRegister(); in addImplicitBufferPtr()
251 return ArgInfo.LDSKernelId.getRegister(); in addLDSKernelId()
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H A DSIMachineFunctionInfo.h774 return ArgInfo.WorkGroupIDX.getRegister();
780 return ArgInfo.WorkGroupIDY.getRegister();
786 return ArgInfo.WorkGroupIDZ.getRegister();
792 return ArgInfo.WorkGroupInfo.getRegister();
814 return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
872 return Arg ? Arg->getRegister() : MCRegister();
898 return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
939 return ArgInfo.QueuePtr.getRegister();
943 return ArgInfo.ImplicitBufferPtr.getRegister();
H A DR600InstrInfo.cpp1015 getIndirectAddrRegClass()->getRegister(Address)); in expandPostRAPseudo()
1028 buildMovInstr(MBB, MI, getIndirectAddrRegClass()->getRegister(Address), in expandPostRAPseudo()
1075 unsigned Reg = R600::R600_TReg32RegClass.getRegister((4 * Index) + Chan); in reserveIndirectRegisters()
1100 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectWrite()
1101 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectWrite()
1102 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectWrite()
1103 case 3: AddrReg = R600::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectWrite()
1132 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectRead()
1133 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectRead()
1134 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectRead()
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H A DR600ISelDAGToDAG.cpp147 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32); in SelectADDRIndirect()
151 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32); in SelectADDRIndirect()
H A DR600ExpandSpecialInstrs.cpp132 R600::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
232 DstReg = R600::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
H A DR600EmitClauseMarkers.cpp163 Op->setReg(R600::R600_KC0RegClass.getRegister(UsedKCache[j].second)); in SubstituteKCacheBank()
166 Op->setReg(R600::R600_KC1RegClass.getRegister(UsedKCache[j].second)); in SubstituteKCacheBank()
H A DAMDGPUArgumentUsageInfo.h69 MCRegister getRegister() const { in getRegister() function
/src/contrib/llvm-project/llvm/lib/CodeGen/
H A DCFIInstrInserter.cpp196 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
205 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
218 CSRRestored.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
255 auto It = CSRLocMap.find(CFI.getRegister()); in calculateOutgoingCFAInfo()
258 {CFI.getRegister(), CSRSavedLocation(CSRReg, CSROffset)}); in calculateOutgoingCFAInfo()
262 CSRSaved.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
H A DMachineOperand.cpp671 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
687 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
694 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
706 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
713 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
721 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
734 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
752 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
758 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
H A DExecutionDomainFix.cpp248 LLVM_DEBUG(dbgs() << printReg(RC->getRegister(rx), TRI) << ":\t" << *MI); in processDefs()
340 const int Def = RDA->getReachingDef(mi, RC->getRegister(rx)); in visitSoftInstr()
342 return RDA->getReachingDef(mi, RC->getRegister(I)) <= Def; in visitSoftInstr()
446 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true); AI.isValid(); in runOnMachineFunction()
/src/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp83 return CurDAG->getRegister(GlobalBaseReg, in INITIALIZE_PASS()
153 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr()
244 PairedReg = CurDAG->getRegister(GPVR, MVT::v2i32); in tryInlineAsm()
290 PairedReg = CurDAG->getRegister(GPVR, MVT::v2i32); in tryInlineAsm()
365 TopPart = CurDAG->getRegister(SP::G0, MVT::i32); in Select()
H A DSparcISelLowering.cpp301 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
310 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
324 RetOps.push_back(DAG.getRegister(SP::I0, PtrVT)); in LowerReturn_32()
405 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
934 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
954 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
988 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
997 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
1026 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
1075 Ops.push_back(DAG.getRegister(Reg, RegsToPass[i].second.getValueType())); in LowerCall_32()
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/src/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp626 getXRegFromWReg(*MRI.getLLVMRegNum(Inst.getRegister(), true)); in generateCompactUnwindEncoding()
649 unsigned LRReg = *MRI.getLLVMRegNum(LRPush.getRegister(), true); in generateCompactUnwindEncoding()
650 unsigned FPReg = *MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding()
672 unsigned Reg1 = *MRI.getLLVMRegNum(Inst.getRegister(), true); in generateCompactUnwindEncoding()
683 unsigned Reg2 = *MRI.getLLVMRegNum(Inst2.getRegister(), true); in generateCompactUnwindEncoding()
/src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp80 return Mips::MSACtrlRegClass.getRegister(RegNum); in getMSACtrlReg()
254 SDValue Zero = CurDAG->getRegister(Mips::ZERO, MVT::i32); in selectAddE()
830 CurDAG->getRegister(Mips::ZERO_64, MVT::i64), in trySelect()
1071 CurDAG->getRegister(Mips::HWR29, MVT::i32), in trySelect()
1156 SDValue ZeroVal = CurDAG->getRegister( in trySelect()
1180 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1203 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1259 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1316 SDValue Zero64Val = CurDAG->getRegister(Mips::ZERO_64, MVT::i64); in trySelect()
/src/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenInstAlias.h78 Record *getRegister() const { in getRegister() function
/src/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp93 ReplaceNode(N, CurDAG->getRegister(GP, N->getValueType(0)).getNode()); in INITIALIZE_PASS()
210 PairedReg = CurDAG->getRegister(GPVR, MVT::i64); in selectInlineAsm()
245 PairedReg = CurDAG->getRegister(GPVR, MVT::i64); in selectInlineAsm()
/src/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelDAGToDAG.cpp135 Reg = CurDAG->getRegister(XCore::CP, MVT::i32); in SelectInlineAsmMemoryOperand()
138 Reg = CurDAG->getRegister(XCore::DP, MVT::i32); in SelectInlineAsmMemoryOperand()
/src/contrib/llvm-project/llvm/lib/MC/
H A DMCDwarf.cpp1334 unsigned Reg1 = Instr.getRegister(); in emitCFIInstruction()
1354 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1376 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1387 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1397 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1413 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1443 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1449 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
/src/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp138 Base = CurDAG->getRegister(Lanai::R0, CN->getValueType(0)); in selectAddrRiSpls()
151 Base = CurDAG->getRegister(Lanai::R0, CN->getValueType(0)); in selectAddrRiSpls()
/src/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp61 SDValue SrcReg = CurDAG->getRegister(LoongArch::R0, GRLenVT); in INITIALIZE_PASS()
219 Base = CurDAG->getRegister(LoongArch::R0, VT); in SelectAddrConstant()

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