| /src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 294 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in set()
390 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT); in CreateRegs()
449 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1) in ComputePHILiveOutRegInfo()
577 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in getValueFromVirtualReg()
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| H A D | FastISel.cpp | 1016 unsigned NumRegs = TLI.getNumRegisters(CLI.RetTy->getContext(), VT); in lowerCallTo()
1800 ResultReg += TLI.getNumRegisters(FuncInfo.Fn->getContext(), AggValueVTs[i]); in selectExtractValue()
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| H A D | SelectionDAGBuilder.cpp | 864 : TLI.getNumRegisters(Context, ValueVT); in RegsForValue()
1063 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value], in AddInlineAsmOperands()
9675 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT, RegVT); in getRegistersForValue()
10817 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT); in LowerCallTo()
11889 const unsigned NumRegisters = TLI.getNumRegisters(*DAG.getContext(), VT); in HandlePHINodesInSuccessorBlocks()
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| H A D | LegalizeIntegerTypes.cpp | 1861 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), VT); in PromoteIntRes_VAARG()
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| /src/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVISelLowering.h | 62 getNumRegisters(LLVMContext &Context, EVT VT,
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| H A D | SPIRVISelLowering.cpp | 39 return getNumRegisters(Context, VT); in getNumRegistersForCallingConv()
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| /src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMachineFunctionInfo.cpp | 50 unsigned NumRegs = TLI.getNumRegisters(Ctx, VT); in computeLegalValueVTs()
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| /src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 442 getNumRegisters(LLVMContext &Context, EVT VT, in getNumRegisters() function
447 return TargetLowering::getNumRegisters(Context, VT); in getNumRegisters()
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| /src/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.h | 644 unsigned getNumRegisters(LLVMContext &Context, EVT VT,
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| H A D | NVPTXISelLowering.cpp | 3139 unsigned NVPTXTargetLowering::getNumRegisters( in getNumRegisters() function in NVPTXTargetLowering
3144 return TargetLoweringBase::getNumRegisters(Context, VT, RegisterVT); in getNumRegisters()
3228 unsigned NumRegs = TLI->getNumRegisters(F->getContext(), ObjectVT); in LowerFormalArguments()
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| /src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.cpp | 111 TLI.getNumRegisters(MF.getFunction().getContext(), OpInfo.ConstraintVT); in getRegistersForValue()
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| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1746 getNumRegisters(LLVMContext &Context, EVT VT,
1781 return getNumRegisters(Context, VT); in getNumRegistersForCallingConv()
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| H A D | BasicTTIImpl.h | 441 return getTLI()->getNumRegisters(Ty->getContext(), ETy); in getRegUsageForType()
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| /src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 119 getNumRegisters(Context, VT.getVectorElementType()); in getNumRegistersForCallingConv()
121 return MipsTargetLowering::getNumRegisters(Context, VT); in getNumRegistersForCallingConv()
136 return NumIntermediates * getNumRegisters(Context, IntermediateVT); in getVectorTypeBreakdownForCallingConv()
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