Searched refs:getBaseIndex (Results 1 – 18 of 18) sorted by relevance
| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveInterval.h | 519 return beginIndex() > Start.getBaseIndex() && in isLocal()
544 const_iterator I = find(Idx.getBaseIndex()); in Query()
556 if (I->start <= Idx.getBaseIndex()) { in Query()
569 if (EarlyVal->def == Idx.getBaseIndex()) in Query()
589 if (Indexes->getNextNonNullIndex(S.start).getBaseIndex() < in isZeroLength()
590 S.end.getBaseIndex()) in isZeroLength()
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| H A D | SlotIndexes.h | 224 SlotIndex getBaseIndex() const { in getBaseIndex() function
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.h | 286 Indexes.push_back(After ? SI.getDeadSlot() : SI.getBaseIndex()); in getLiveRegMap()
325 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS, in getLiveRegsBefore()
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| H A D | GCNRegPressure.cpp | 283 InstrSI = LIS.getInstructionIndex(*MO.getParent()).getBaseIndex(); in collectVirtualRegUses()
442 : LIS.getInstructionIndex(*NextMI).getBaseIndex(); in advanceBeforeNext()
552 const auto &SI = LIS.getInstructionIndex(*LastTrackedMI).getBaseIndex(); in isValid()
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| H A D | SIWholeQuadMode.cpp | 1102 SlotIndex Next = S->start.getBaseIndex(); in prepareInsertion()
1107 MachineInstr *EndMI = LIS->getInstructionFromIndex(S->end.getBaseIndex()); in prepareInsertion()
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| /src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveIntervals.cpp | 1116 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex()); in handleMoveDown()
1143 LR.advanceTo(Next, NewIdx.getBaseIndex()); in handleMoveDown()
1289 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex()); in handleMoveUp()
1355 assert(NewIdxIn == LR.find(NewIdx.getBaseIndex())); in handleMoveUp()
1753 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex()); in removeVRegDefAt()
1760 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex()) in removeVRegDefAt()
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| H A D | RenameIndependentSubregs.cpp | 191 : Pos.getBaseIndex(); in findComponents()
225 : Pos.getBaseIndex(); in rewriteOperands()
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| H A D | SplitKit.cpp | 667 Idx = Idx.getBaseIndex(); in enterIntvBefore()
783 Idx = Idx.getBaseIndex(); in leaveIntvBefore()
1696 LeaveBefore.getBaseIndex() > EnterAfter.getBoundaryIndex())) { in splitLiveThroughBlock()
1859 if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) { in splitRegOutBlock()
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| H A D | VirtRegMap.cpp | 515 SlotIndex BeforeMIUses = MIIndex.getBaseIndex(); in subRegLiveThrough()
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| H A D | RegisterPressure.cpp | 623 LaneMask = getLiveLanesAt(LIS, MRI, true, RegUnit, Pos.getBaseIndex()); in adjustLaneLiveness()
1259 Pos.getBaseIndex(), LaneBitmask::getNone(), in getLastUsedLanes()
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| H A D | RegAllocGreedy.cpp | 1498 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr; in calcGapWeights()
1531 if (Uses[Gap+1].getBaseIndex() >= IntI.stop()) in calcGapWeights()
1555 if (Uses[Gap+1].getBaseIndex() >= I->end) in calcGapWeights()
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| H A D | InlineSpiller.cpp | 632 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); in reMaterializeFor()
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| H A D | RegisterCoalescer.cpp | 1024 if (S->start.getBaseIndex() == CopyIdx.getBaseIndex()) in removeCopyByCommutingDef()
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| H A D | LiveDebugVariables.cpp | 1593 Idx = Idx.getBaseIndex(); in findInsertLocation()
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| H A D | TwoAddressInstructionPass.cpp | 1707 if (S->end.getBaseIndex() != UseIdx) in processTiedPairs()
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| /src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 374 for (SlotIndex I = S.start.getBaseIndex(), E = S.end.getBaseIndex(); in shouldCoalesce()
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| /src/contrib/llvm-project/clang/lib/AST/ |
| H A D | ExprConstant.cpp | 3446 static unsigned getBaseIndex(const CXXRecordDecl *Derived, in getBaseIndex() function
3894 O = &O->getStructBase(getBaseIndex(Derived, Base)); in findSubobject()
10332 Value = &Value->getStructBase(getBaseIndex(RD, Base)); in VisitCastExpr()
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| /src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1215 if (S->end.getBaseIndex() == Idx) in classifyLEAReg()
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