Home
last modified time | relevance | path

Searched refs:eims (Results 1 – 4 of 4) sorted by relevance

/src/sys/dev/igc/
H A Dif_igc.h280 u32 eims; /* This queue's EIMS bit */ member
289 u32 eims; member
H A Dif_igc.c1100 IGC_WRITE_REG(&sc->hw, IGC_EIMS, rxq->eims); in igc_if_rx_queue_intr_enable()
1110 IGC_WRITE_REG(&sc->hw, IGC_EIMS, txq->eims); in igc_if_tx_queue_intr_enable()
1553 rx_que->eims = 1 << vector; in igc_if_msix_intr_assign()
1573 tx_que->eims = 1 << i; in igc_if_msix_intr_assign()
1637 sc->que_mask |= tx_que->eims; in igc_configure_queues()
/src/sys/dev/e1000/
H A Dif_em.h456 u32 eims; /* This queue's EIMS bit */ member
465 u32 eims; member
H A Dif_em.c1870 E1000_WRITE_REG(&sc->hw, E1000_IMS, rxq->eims); in em_if_rx_queue_intr_enable()
1880 E1000_WRITE_REG(&sc->hw, E1000_IMS, txq->eims); in em_if_tx_queue_intr_enable()
1890 E1000_WRITE_REG(&sc->hw, E1000_EIMS, rxq->eims); in igb_if_rx_queue_intr_enable()
1900 E1000_WRITE_REG(&sc->hw, E1000_EIMS, txq->eims); in igb_if_tx_queue_intr_enable()
2491 rx_que->eims = 1 << (20 + i); in em_if_msix_intr_assign()
2492 sc->ims |= rx_que->eims; in em_if_msix_intr_assign()
2495 rx_que->eims = E1000_EICR_TX_QUEUE0 << vector; in em_if_msix_intr_assign()
2497 rx_que->eims = 1 << vector; in em_if_msix_intr_assign()
2518 tx_que->eims = 1 << (22 + i); in em_if_msix_intr_assign()
2519 sc->ims |= tx_que->eims; in em_if_msix_intr_assign()
[all …]