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Searched refs:dmb (Results 1 – 20 of 20) sorted by relevance

/src/sys/arm/include/
H A Datomic.h46 #define dmb() __asm __volatile("dmb" : : : "memory") macro
48 #define mb() dmb()
49 #define wmb() dmb()
50 #define rmb() dmb()
59 dmb(); \
65 dmb(); \
74 dmb(); \
80 dmb(); \
245 dmb(); in atomic_fcmpset_acq_8()
254 dmb(); in atomic_fcmpset_rel_8()
[all …]
H A Dpmap_var.h144 dmb(); in pte1_store()
284 dmb(); in pte2_store()
H A Dasm.h179 #define DMB dmb
/src/sys/arm64/linux/
H A Dlinux_support.S79 3: dmb ish
102 3: dmb ish
125 3: dmb ish
148 3: dmb ish
171 3: dmb ish
/src/contrib/ofed/include/
H A Dudma_barrier.h106 #define udma_to_device_barrier() dmb()
146 #define udma_from_device_barrier() dmb()
216 #define mmio_flush_writes() dmb()
/src/sys/arm64/include/
H A Datomic.h52 #define dmb(opt) __asm __volatile("dmb " __STRING(opt) : : : "memory") macro
54 #define mb() dmb(sy) /* Full system memory barrier all */
55 #define wmb() dmb(st) /* Full system memory barrier store */
56 #define rmb() dmb(ld) /* Full system memory barrier load */
652 dmb(ld);
659 dmb(sy); in atomic_thread_fence_rel()
666 dmb(sy); in atomic_thread_fence_acq_rel()
673 dmb(sy); in atomic_thread_fence_seq_cst()
/src/sys/contrib/alpine-hal/
H A Dal_hal_plat_services.h128 dmb(); in al_smp_data_memory_barrier()
130 dmb(ish); in al_smp_data_memory_barrier()
/src/contrib/llvm-project/compiler-rt/lib/builtins/arm/
H A Dsync-ops.h18 #define DMB dmb
/src/contrib/llvm-project/compiler-rt/lib/builtins/aarch64/
H A Dlse.S104 #define BARRIER dmb ish
/src/sys/arm/arm/
H A Dstdatomic.c74 dmb(); in do_sync()
H A Dcpuinfo.c520 dmb(); in sysctl_disable_bp_hardening()
/src/sys/arm64/iommu/
H A Diommu_pmap.c461 dmb(ishst); in _pmap_alloc_l3()
/src/sys/arm64/arm64/
H A Dpmap.c2869 dmb(ishst); in _pmap_alloc_l3()
3207 dmb(ishst); in pmap_growkernel_nopanic()
3227 dmb(ishst); in pmap_growkernel_nopanic()
9898 dmb(ishst); in pmap_san_enter()
9921 dmb(ishst); in pmap_san_enter()
9930 dmb(ishst); in pmap_san_enter()
/src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFeatures.td140 "Has data barrier (dmb/dsb) instructions">;
H A DARMInstrThumb2.td3612 "dmb", "\t$opt", [(int_arm_dmb (i32 imm0_15:$opt))]>,
5083 def : InstAlias<"dmb${p}.w\t$opt", (t2DMB memb_opt:$opt, pred:$p), 0>, Requires<[HasDB]>;
5084 def : InstAlias<"dmb${p}", (t2DMB 0xf, pred:$p), 0>, Requires<[HasDB]>;
5085 def : InstAlias<"dmb${p}.w", (t2DMB 0xf, pred:$p), 0>, Requires<[HasDB]>;
H A DARMInstrInfo.td5137 "dmb", "\t$opt", [(int_arm_dmb (i32 imm0_15:$opt))]>,
6242 def : InstAlias<"dmb", (DMB 0xf), 0>, Requires<[IsARM, HasDB]>;
/src/sys/crypto/openssl/arm/
H A Dsha1-armv4-large.S511 @ dmb @ errata #451034 on early Cortex A8
/src/sys/dev/sym/
H A Dsym_hipd.c128 #define MEMORY_BARRIER() dmb()
130 #define MEMORY_BARRIER() dmb(sy)
/src/sys/contrib/openzfs/module/icp/asm-arm/sha2/
H A Dsha512-armv7.S506 dmb @ errata #451034 on early Cortex A8
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td1237 def DMB : CRmSystemI<barrier_op, 0b101, "dmb",