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Searched refs:computeInstrLatency (Results 1 – 19 of 19) sorted by relevance

/src/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSchedule.cpp177 const unsigned InstrLatency = computeInstrLatency(DefMI); in computeOperandLatency()
240 TargetSchedModel::computeInstrLatency(const MCSchedClassDesc &SCDesc) const { in computeInstrLatency() function in TargetSchedModel
241 return capLatency(MCSchedModel::computeInstrLatency(*STI, SCDesc)); in computeInstrLatency()
244 unsigned TargetSchedModel::computeInstrLatency(unsigned Opcode) const { in computeInstrLatency() function in TargetSchedModel
247 return capLatency(SchedModel.computeInstrLatency(*STI, SCIdx)); in computeInstrLatency()
250 unsigned TargetSchedModel::computeInstrLatency(const MCInst &Inst) const { in computeInstrLatency() function in TargetSchedModel
252 return capLatency(SchedModel.computeInstrLatency(*STI, *TII, Inst)); in computeInstrLatency()
253 return computeInstrLatency(Inst.getOpcode()); in computeInstrLatency()
257 TargetSchedModel::computeInstrLatency(const MachineInstr *MI, in computeInstrLatency() function in TargetSchedModel
268 return computeInstrLatency(*SCDesc); in computeInstrLatency()
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H A DMachineCombiner.cpp294 LatencyOp = TSchedModel.computeInstrLatency(NewRoot); in getLatency()
328 NewRootLatency += TSchedModel.computeInstrLatency(InsInstrs[i]); in getLatenciesForInstrSequences()
333 RootLatency += TSchedModel.computeInstrLatency(I); in getLatenciesForInstrSequences()
392 NewRootLatency = TSchedModel.computeInstrLatency(InsInstrs.back()); in improvesCriticalPathLen()
393 RootLatency = TSchedModel.computeInstrLatency(Root); in improvesCriticalPathLen()
H A DEarlyIfConversion.cpp1168 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1182 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1188 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
H A DIfConversion.cpp1120 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions()
2180 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock()
H A DScheduleDAGInstrs.cpp594 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
/src/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp42 int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI, in computeInstrLatency() function in MCSchedModel
58 int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI, in computeInstrLatency() function in MCSchedModel
64 return MCSchedModel::computeInstrLatency(STI, SCDesc); in computeInstrLatency()
69 int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI, in computeInstrLatency() function in MCSchedModel
84 return MCSchedModel::computeInstrLatency(STI, *SCDesc); in computeInstrLatency()
/src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h46 unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const;
188 unsigned computeInstrLatency(const MachineInstr *MI,
190 unsigned computeInstrLatency(const MCInst &Inst) const;
191 unsigned computeInstrLatency(unsigned Opcode) const;
/src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSchedule.h368 static int computeInstrLatency(const MCSubtargetInfo &STI,
371 int computeInstrLatency(const MCSubtargetInfo &STI, unsigned SClass) const;
372 int computeInstrLatency(const MCSubtargetInfo &STI, const MCInstrInfo &MCII,
/src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86PadShortFunction.cpp207 CyclesToEnd += TSM.computeInstrLatency(&MI); in cyclesUntilReturn()
H A DX86FixupInstTuning.cpp95 return MCSchedModel::computeInstrLatency( in processInstruction()
H A DX86CmovConversion.cpp483 unsigned Latency = TSchedModel.computeInstrLatency(&MI); in checkForProfitableCmovCandidates()
H A DX86FixupLEAs.cpp322 InstrDistance += TSM.computeInstrLatency(&*CurInst); in searchBackwards()
/src/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp136 IIVDEntry.Latency = MCSchedModel::computeInstrLatency(STI, SCDesc); in collectData()
/src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.cpp2039 std::max(HazardDefLatency, TSchedModel.computeInstrLatency(&MI)); in checkMAIHazards908()
2116 std::max(HazardDefLatency, TSchedModel.computeInstrLatency(&MI)); in checkMAIHazards908()
2259 TSchedModel.computeInstrLatency(MI1) == 2) in checkMAIHazards90A()
2276 int NumPasses = TSchedModel.computeInstrLatency(MI1); in checkMAIHazards90A()
2326 int NumPasses = TSchedModel.computeInstrLatency(MI1); in checkMAIHazards90A()
2562 unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA); in checkMAIVALUHazards()
2653 int NumPasses = TSchedModel.computeInstrLatency(MFMA); in checkMAIVALUHazards()
2719 unsigned HazardDefLatency = TSchedModel.computeInstrLatency(MFMA); in checkMAIVALUHazards()
2758 return W < (int)TSchedModel.computeInstrLatency(MAI); in ShouldPreferAnother()
H A DAMDGPUSubtarget.cpp989 unsigned Lat = TSchedModel->computeInstrLatency(&MAI) - 1; in apply()
H A DGCNSchedStrategy.cpp1099 unsigned Latency = SM.computeInstrLatency(DefMI); in computeSUnitReadyCycle()
H A DSIInstrInfo.cpp9543 Lat = std::max(Lat, SchedModel.computeInstrLatency(&*I)); in getInstrLatency()
9548 return SchedModel.computeInstrLatency(&MI); in getInstrLatency()
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SIMDInstrOpt.cpp255 ReplCost += SchedModel.computeInstrLatency(IDesc->getOpcode()); in shouldReplaceInst()
257 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) in shouldReplaceInst()
/src/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp233 int Latency = MCSchedModel::computeInstrLatency(STI, SCDesc); in computeMaxLatency()