Searched refs:XtensaTargetMachine (Results 1 – 6 of 6) sorted by relevance
| /src/contrib/llvm-project/llvm/lib/Target/Xtensa/ ! |
| H A D | XtensaTargetMachine.cpp | 28 RegisterTargetMachine<XtensaTargetMachine> A(getTheXtensaTarget()); in LLVMInitializeXtensaTarget() 45 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, in XtensaTargetMachine() function in XtensaTargetMachine 59 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, in XtensaTargetMachine() function in XtensaTargetMachine 65 : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} in XtensaTargetMachine() 68 XtensaTargetMachine::getSubtargetImpl(const Function &F) const { in getSubtargetImpl() 90 XtensaPassConfig(XtensaTargetMachine &TM, PassManagerBase &PM) in XtensaPassConfig() 93 XtensaTargetMachine &getXtensaTargetMachine() const { in getXtensaTargetMachine() 94 return getTM<XtensaTargetMachine>(); in getXtensaTargetMachine() 106 TargetPassConfig *XtensaTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
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| H A D | XtensaTargetMachine.h | 25 class XtensaTargetMachine : public LLVMTargetMachine { 28 XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 34 XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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| H A D | Xtensa.h | 22 class XtensaTargetMachine; variable 25 FunctionPass *createXtensaISelDag(XtensaTargetMachine &TM,
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| H A D | XtensaISelDAGToDAG.cpp | 31 XtensaDAGToDAGISel(XtensaTargetMachine &TM, CodeGenOptLevel OptLevel) in XtensaDAGToDAGISel() 109 XtensaDAGToDAGISelLegacy(XtensaTargetMachine &TM, CodeGenOptLevel OptLevel) in XtensaDAGToDAGISelLegacy() 121 FunctionPass *llvm::createXtensaISelDag(XtensaTargetMachine &TM, in createXtensaISelDag()
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| H A D | XtensaFrameLowering.h | 15 class XtensaTargetMachine; variable
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| H A D | XtensaInstrInfo.h | 29 class XtensaTargetMachine; variable
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