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Searched refs:XT (Results 1 – 25 of 31) sorted by relevance

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/src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt200 (outs vsfrc:$XT), (ins vsfrc:$XB),
201 "xsrsqrtedp $XT, $XB", IIC_VecFP,
202 [(set f64:$XT, (PPCfrsqrte f64:$XB))]>;
314 (set i128:$XT, (int_ppc_vsx_xscmpeqdp f64:$XA, f64:$XB))
315 (set i128:$XT, (int_ppc_vsx_xscmpgedp f64:$XA, f64:$XB))
316 (set i128:$XT, (int_ppc_vsx_xscmpgtdp f64:$XA, f64:$XB))
317 (set i128:$XT, (int_ppc_vsx_xscmpnedp f64:$XA, f64:$XB))
322 "xvcmpeqdp", "$XT, $XA, $XB", IIC_VecFPCompare,
330 (outs vsfrc:$XT), (ins vsfrc:$XB),
331 "xscvdpsp $XT, $XB", IIC_VecFP, []>;
[all …]
H A DPPCInstrVSX.td147 def NAME : XX3Form_Rc<opcode, xo, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
149 [(set OutTy:$XT, (Int InTy:$XA, InTy:$XB))]>;
151 def _rec : XX3Form_Rc<opcode, xo, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
153 [(set InTy:$XT,
213 : XX2_RD6_XO5_RS6<opcode, xo2, xo, (outs vtype:$XT), (ins vtype:$XB),
214 !strconcat(opc, " $XT, $XB"), IIC_VecFP, pattern>;
220 : XX3Form<opcode, xo, (outs xty:$XT), (ins aty:$XA, bty:$XB),
221 !strconcat(opc, " $XT, $XA, $XB"), itin, pattern>;
266 : XX1Form_memOp<opcode, xo, (outs vtype:$XT), (ins (memrr $RA, $RB):$addr),
267 !strconcat(opc, " $XT, $addr"), IIC_LdStLFD, pattern>;
[all …]
H A DPPCInstrFuture.td56 def LXVRL : XX1Form_memOp<31, 525, (outs vsrc:$XT), (ins memr:$RA, g8rc:$RB),
57 "lxvrl $XT, $RA, $RB", IIC_LdStLoad, []>;
59 def LXVRLL : XX1Form_memOp<31, 557, (outs vsrc:$XT), (ins memr:$RA, g8rc:$RB),
60 "lxvrll $XT, $RA, $RB", IIC_LdStLoad, []>;
73 (ins vsrc:$XT, memr:$RA, g8rc:$RB),
74 "stxvrl $XT, $RA, $RB", IIC_LdStLoad, []>;
77 (ins vsrc:$XT, memr:$RA, g8rc:$RB),
78 "stxvrll $XT, $RA, $RB", IIC_LdStLoad, []>;
H A DPPCInstrP10.td24 // * FRT/RT/VT/XT/BT - target register
48 // The operand is an 8-bit immediate (IMM), the destination (XT)
310 bits<6> XT;
315 let Inst{6-10} = XT{4-0};
319 let Inst{31} = XT{5};
326 bits<6> XT;
343 let Inst{38-42} = XT{4-0};
351 let Inst{63} = XT{5};
444 bits<6> XT;
457 let Inst{38-42} = XT{4-0};
[all …]
H A DPPCInstrFormats.td408 bits<6> XT;
414 let Inst{6-10} = XT{4-0};
417 let Inst{28} = XT{5};
1044 bits<6> XT;
1049 let Inst{6-10} = XT{4-0};
1053 let Inst{31} = XT{5};
1085 bits<6> XT;
1091 let Inst{6-10} = XT{4-0};
1095 let Inst{31} = XT{5};
1111 bits<6> XT;
[all …]
/src/contrib/sendmail/libsmutil/
H A Dt-maplock-0.sh77 for XT in ${MAPTX}
80 MT=`echo $XT | cut -d: -f1`
81 EXT=`echo $XT | cut -d: -f2`
/src/crypto/openssl/test/certs/
H A Dee-key-3072.pem22 bI+jbw2ylyF0RnwAd7EFvm7Ip/zANl176sFkLYCPYptH+x+N4RHRg+XT/COK2NrA
/src/usr.bin/compress/doc/
H A Drevision.log28 * Incorporate portability suggestions for Z8000, IBM PC/XT from mailing list.
H A DREADME7 o Portability mods for Z8000 and PC/XT (but not zeus 3.2)
/src/share/misc/
H A Dpci_vendors1373 1002 0002 Radeon 9600XT
1374 1002 4772 All-in-Wonder 9600 XT
1375 1043 c002 Radeon 9600 XT TVD
1378 174b 7c29 Radeon 9600XT
1379 1787 4002 Radeon 9600 XT
1403 1002 0003 Radeon 9600XT (Secondary)
1404 1002 4773 All-in-Wonder 9600 XT (Secondary)
1407 174b 7c28 Radeon 9600XT (Secondary)
1408 1787 4003 Radeon 9600 XT (Secondary)
1816 4a50 R420 [Radeon X800 XT Platinum Edition AGP]
[all …]
/src/sys/dev/firewire/
H A D00README123 - HDD: Personal Storage 3000XT 160GB
/src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM7.td384 (instregex "(t|t2)(S|U)XT(B|H)")>;
H A DARMScheduleM55.td230 "t2MOVr$", "t2SUBS?ri$", "t2[US]XT[BH]$")>;
H A DARMScheduleM85.td505 (instregex "(t|t2)(S|U)XT(B|H)")>;
/src/contrib/file/magic/Magdir/
H A Dsysex125 >>2 byte 0x0E microwave2 / XT
/src/sys/x86/conf/
H A DNOTES306 # 0x04 Old-style (XT) keyboard support, useful for older ThinkPads
/src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZScheduleZEC12.td1106 def : InstRW<[WLat11LSU, LSU, DFU4, GroupAlone], (instregex "S(L|R)XT$")>;
1127 def : InstRW<[WLat10, LSU, DFU2, NormalGr], (instregex "TD(C|G)XT$")>;
H A DSystemZScheduleZ196.td1062 def : InstRW<[WLat11LSU, LSU, DFU4, GroupAlone], (instregex "S(L|R)XT$")>;
1083 def : InstRW<[WLat10, LSU, DFU2, NormalGr], (instregex "TD(C|G)XT$")>;
H A DSystemZScheduleZ13.td1143 def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1163 def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
H A DSystemZScheduleZ16.td1189 def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1209 def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
H A DSystemZScheduleZ15.td1183 def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1203 def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
H A DSystemZScheduleZ14.td1161 def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1181 def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
/src/contrib/ncurses/include/
H A DCaps-ncurses390 userdef XT bool - terminal understands special xterm sequences (OSC, mouse tracking).
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedOryon.td1496 "^SQ(ABS|NEG)v", "^SQ(XT|XTU)(N|N2)v",
/src/contrib/llvm-project/clang/lib/AST/
H A DASTContext.cpp7048 QualType XT = GetTypeAsWritten(FuncX), YT = GetTypeAsWritten(FuncY); in isSameEntity() local
7049 if (!hasSameType(XT, YT)) { in isSameEntity()
7053 auto *XFPT = XT->getAs<FunctionProtoType>(); in isSameEntity()
7058 hasSameFunctionTypeIgnoringExceptionSpec(XT, YT)) in isSameEntity()

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