| /src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 4608 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_Ternary() local
4613 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3); in WidenVecRes_Ternary()
4619 GetWidenedMask(N->getOperand(3), WidenVT.getVectorElementCount()); in WidenVecRes_Ternary()
4620 return DAG.getNode(N->getOpcode(), dl, WidenVT, in WidenVecRes_Ternary()
4627 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_Binary() local
4631 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, in WidenVecRes_Binary()
4638 GetWidenedMask(N->getOperand(2), WidenVT.getVectorElementCount()); in WidenVecRes_Binary()
4639 return DAG.getNode(N->getOpcode(), dl, WidenVT, in WidenVecRes_Binary()
4668 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_BinaryWithExtraScalarOp() local
4672 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3, in WidenVecRes_BinaryWithExtraScalarOp()
[all …]
|
| H A D | SelectionDAGBuilder.cpp | 722 EVT WidenVT = in getCopyToPartsVector() local
725 SDValue Widened = widenVectorToPartType(DAG, Val, DL, WidenVT); in getCopyToPartsVector()
|
| /src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5097 MVT WidenVT = MVT::getVectorVT(MVT::i8, VT.getVectorElementCount()); in lowerVECTOR_SHUFFLE() local
5098 V1 = DAG.getNode(ISD::ZERO_EXTEND, DL, WidenVT, V1); in lowerVECTOR_SHUFFLE()
5099 V2 = V2.isUndef() ? DAG.getUNDEF(WidenVT) in lowerVECTOR_SHUFFLE()
5100 : DAG.getNode(ISD::ZERO_EXTEND, DL, WidenVT, V2); in lowerVECTOR_SHUFFLE()
5101 SDValue Shuffled = DAG.getVectorShuffle(WidenVT, DL, V1, V2, SVN->getMask()); in lowerVECTOR_SHUFFLE()
5102 return DAG.getSetCC(DL, VT, Shuffled, DAG.getConstant(0, DL, WidenVT), in lowerVECTOR_SHUFFLE()
10652 MVT WidenVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerVECTOR_REVERSE() local
10653 SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, WidenVT, Op.getOperand(0)); in lowerVECTOR_REVERSE()
10654 SDValue Op2 = DAG.getNode(ISD::VECTOR_REVERSE, DL, WidenVT, Op1); in lowerVECTOR_REVERSE()
|
| /src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32723 MVT WidenVT = getTypeToTransformTo(*DAG.getContext(), VT).getSimpleVT(); in ReplaceNodeResults() local
32729 unsigned WidenNumElts = WidenVT.getVectorNumElements(); in ReplaceNodeResults()
32738 Res = widenSubVector(WidenVT, Res, false, Subtarget, DAG, dl); in ReplaceNodeResults()
32744 if ((128 % InBits) == 0 && WidenVT.is128BitVector()) { in ReplaceNodeResults()
32753 assert(isTypeLegal(WidenVT) && isTypeLegal(WidenIn.getValueType()) && in ReplaceNodeResults()
32755 WidenIn = DAG.getBitcast(WidenVT, WidenIn); in ReplaceNodeResults()
32757 DAG.getVectorShuffle(WidenVT, dl, WidenIn, WidenIn, TruncMask)); in ReplaceNodeResults()
32768 Results.push_back(DAG.getNode(X86ISD::VTRUNC, dl, WidenVT, In)); in ReplaceNodeResults()
32775 Results.push_back(DAG.getNode(X86ISD::VTRUNC, dl, WidenVT, In)); in ReplaceNodeResults()
32805 Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, WidenVT, WidenIn)); in ReplaceNodeResults()
|
| /src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6600 MVT WidenVT = MVT::getVectorVT(MVT::getIntegerVT(EltSize), NumElts); in LowerCTPOP() local
6601 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, Ops); in LowerCTPOP()
|
| /src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 10130 MVT WidenVT = MVT::getVectorVT(MVT::getIntegerVT(EltSize), NumElts); in LowerCTPOP_PARITY() local
10131 Val = DAG.getNode(AArch64ISD::UADDLP, DL, WidenVT, Val); in LowerCTPOP_PARITY()
|