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Searched refs:VL (Results 1 – 25 of 91) sorted by relevance

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/src/crypto/openssl/crypto/aes/asm/
H A Daes-riscv64-zvbb-zvkg-zvkned.pl72 my ($VL) = ("a7");
109 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "ma"]}
187 addi $VL, $VL, -4
190 @{[vslidedown_vx $V24, $V24, $VL]}
192 @{[vslidedown_vx $V16, $V16, $VL]}
246 addi $VL, $VL, -4
249 @{[vslidedown_vx $V16, $V16, $VL]}
456 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "ma"]}
460 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "ma"]}
469 slli $T0, $VL, 2
[all …]
H A Daes-riscv64-zvkb-zvkned.pl70 my ($VL) = ("t4");
107 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "mu"]}
171 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "mu"]}
177 slli $T0, $VL, 2
178 srli $CTR, $VL, 2
179 sub $LEN32, $LEN32, $VL
247 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "mu"]}
253 slli $T0, $VL, 2
254 srli $CTR, $VL, 2
255 sub $LEN32, $LEN32, $VL
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H A Daes-riscv64-zvkned.pl594 my ($VL) = ("a6");
630 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "ma"]}
631 slli $T0, $VL, 2
632 sub $LEN32, $LEN32, $VL
657 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "ma"]}
658 slli $T0, $VL, 2
659 sub $LEN32, $LEN32, $VL
684 @{[vsetvli $VL, $LEN32, "e32", "m4", "ta", "ma"]}
685 slli $T0, $VL, 2
686 sub $LEN32, $LEN32, $VL
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/src/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/
H A DVarLocBasedImpl.cpp477 VarLoc VL(MI); in CreateEntryLoc() local
478 assert(VL.Locs.size() == 1 && in CreateEntryLoc()
479 VL.Locs[0].Kind == MachineLocKind::RegisterKind); in CreateEntryLoc()
480 VL.EVKind = EntryValueLocKind::EntryValueKind; in CreateEntryLoc()
481 VL.Expr = EntryExpr; in CreateEntryLoc()
482 VL.Locs[0].Value.RegNo = Reg; in CreateEntryLoc()
483 return VL; in CreateEntryLoc()
492 VarLoc VL(MI); in CreateEntryBackupLoc() local
493 assert(VL.Locs.size() == 1 && in CreateEntryBackupLoc()
494 VL.Locs[0].Kind == MachineLocKind::RegisterKind); in CreateEntryBackupLoc()
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/src/contrib/llvm-project/clang/lib/AST/
H A DDeclOpenMP.cpp31 ArrayRef<Expr *> VL) { in Create() argument
33 C, DC, std::nullopt, VL.size(), L); in Create()
34 D->setVars(VL); in Create()
45 void OMPThreadPrivateDecl::setVars(ArrayRef<Expr *> VL) { in setVars() argument
46 assert(VL.size() == Data->getNumChildren() && in setVars()
48 llvm::copy(VL, getVars().begin()); in setVars()
58 SourceLocation L, ArrayRef<Expr *> VL, in Create() argument
61 C, DC, CL, VL.size(), L); in Create()
62 D->setVars(VL); in Create()
74 void OMPAllocateDecl::setVars(ArrayRef<Expr *> VL) { in setVars() argument
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H A DOpenMPClause.cpp427 void OMPPrivateClause::setPrivateCopies(ArrayRef<Expr *> VL) { in setPrivateCopies() argument
428 assert(VL.size() == varlist_size() && in setPrivateCopies()
430 std::copy(VL.begin(), VL.end(), varlist_end()); in setPrivateCopies()
436 ArrayRef<Expr *> VL, ArrayRef<Expr *> PrivateVL) { in Create() argument
438 void *Mem = C.Allocate(totalSizeToAlloc<Expr *>(2 * VL.size())); in Create()
440 new (Mem) OMPPrivateClause(StartLoc, LParenLoc, EndLoc, VL.size()); in Create()
441 Clause->setVarRefs(VL); in Create()
452 void OMPFirstprivateClause::setPrivateCopies(ArrayRef<Expr *> VL) { in setPrivateCopies() argument
453 assert(VL.size() == varlist_size() && in setPrivateCopies()
455 std::copy(VL.begin(), VL.end(), varlist_end()); in setPrivateCopies()
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/src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp297 static std::string shortBundleName(ArrayRef<Value *> VL) { in shortBundleName() argument
300 OS << "n=" << VL.size() << " [" << *VL.front() << ", ..]"; in shortBundleName()
308 static bool allSameBlock(ArrayRef<Value *> VL) { in allSameBlock() argument
309 Instruction *I0 = dyn_cast<Instruction>(VL[0]); in allSameBlock()
312 if (all_of(VL, isVectorLikeInstWithConstOps)) in allSameBlock()
316 for (int I = 1, E = VL.size(); I < E; I++) { in allSameBlock()
317 auto *II = dyn_cast<Instruction>(VL[I]); in allSameBlock()
329 static bool allConstant(ArrayRef<Value *> VL) { in allConstant() argument
332 return all_of(VL, isConstant); in allConstant()
337 static bool isSplat(ArrayRef<Value *> VL) { in isSplat() argument
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H A DLoopIdiomVectorize.cpp511 Value *VL = Builder.CreateIntrinsic(Intrinsic::experimental_get_vector_length, in createPredicatedFindMismatch() local
522 {VectorLhsGep, AllTrueMask, VL}, nullptr, "lhs.load"); in createPredicatedFindMismatch()
528 {VectorRhsGep, AllTrueMask, VL}, nullptr, "rhs.load"); in createPredicatedFindMismatch()
535 {VectorLhsLoad, VectorRhsLoad, Pred, AllTrueMask, VL}, nullptr, in createPredicatedFindMismatch()
540 VL}); in createPredicatedFindMismatch()
541 Value *MismatchFound = Builder.CreateICmpNE(CTZ, VL); in createPredicatedFindMismatch()
554 Value *VL64 = Builder.CreateZExt(VL, I64Type); in createPredicatedFindMismatch()
/src/crypto/openssl/crypto/chacha/asm/
H A Dchacha-riscv64-v-zbb.pl85 my ( $VL ) = ( "t1" );
268 @{[vsetvli $VL, $T0, "e32", "m1", "ta", "ma"]}
269 slli $T1, $VL, 6
273 addi $T1, $VL, -1
274 @{[vsetvli $VL, $T1, "e32", "m1", "ta", "ma"]}
317 add $COUNTER0, $CURRENT_COUNTER, $VL
437 add $STATE12, $STATE12, $VL
469 slli $T0, $VL, 6
474 add $CURRENT_COUNTER, $CURRENT_COUNTER, $VL
483 @{[vsetvli $VL, $T1, "e8", "m8", "ta", "ma"]}
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/src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrFormatsV.td71 let Defs = [VTYPE, VL];
87 let Defs = [VTYPE, VL];
104 let Defs = [VTYPE, VL];
123 let Uses = [VTYPE, VL];
143 let Uses = [VTYPE, VL];
162 let Uses = [VTYPE, VL];
182 let Uses = [VTYPE, VL];
201 let Uses = [VTYPE, VL];
223 let Uses = [VTYPE, VL];
245 let Uses = [VTYPE, VL];
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H A DRISCVISelLowering.cpp2762 static SDValue getAllOnesMask(MVT VecVT, SDValue VL, const SDLoc &DL, in getAllOnesMask() argument
2765 return DAG.getNode(RISCVISD::VMSET_VL, DL, MaskVT, VL); in getAllOnesMask()
2785 SDValue VL = DAG.getRegister(RISCV::X0, Subtarget.getXLenVT()); in getDefaultScalableVLOps() local
2786 SDValue Mask = getAllOnesMask(VecVT, VL, DL, DAG); in getDefaultScalableVLOps()
2787 return {Mask, VL}; in getDefaultScalableVLOps()
2794 SDValue VL = getVLOp(NumElts, ContainerVT, DL, DAG, Subtarget); in getDefaultVLOps() local
2795 SDValue Mask = getAllOnesMask(ContainerVT, VL, DL, DAG); in getDefaultVLOps()
2796 return {Mask, VL}; in getDefaultVLOps()
2976 auto [Mask, VL] = getDefaultVLOps(DstVT, DstContainerVT, DL, DAG, Subtarget); in lowerFP_TO_INT_SAT()
2980 DAG.getUNDEF(Mask.getValueType()), Mask, VL}); in lowerFP_TO_INT_SAT()
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H A DRISCVCodeGenPrepare.cpp172 Value *BasePtr, *VL; in expandVPStrideLoad() local
176 m_Value(BasePtr), m_Zero(), m_AllOnes(), m_Value(VL)))) in expandVPStrideLoad()
184 if (!isKnownNonZero(VL, {*DL, DT, nullptr, &II})) in expandVPStrideLoad()
193 {Val, II.getOperand(2), VL}); in expandVPStrideLoad()
H A DRISCVRegisterInfo.cpp138 markSuperRegs(Reserved, RISCV::VL); in getReservedRegs()
342 Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass); in lowerVSPILL() local
347 STI.getInstrInfo()->movImm(MBB, II, DL, VL, Offset); in lowerVSPILL()
349 BuildMI(MBB, II, DL, TII->get(RISCV::PseudoReadVLENB), VL); in lowerVSPILL()
352 BuildMI(MBB, II, DL, TII->get(RISCV::SLLI), VL) in lowerVSPILL()
353 .addReg(VL) in lowerVSPILL()
374 .addReg(VL, getKillRegState(I == NF - 2)); in lowerVSPILL()
419 Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass); in lowerVRELOAD() local
424 STI.getInstrInfo()->movImm(MBB, II, DL, VL, Offset); in lowerVRELOAD()
426 BuildMI(MBB, II, DL, TII->get(RISCV::PseudoReadVLENB), VL); in lowerVRELOAD()
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H A DRISCVVectorPeephole.cpp84 MachineOperand &VL = MI.getOperand(RISCVII::getVLOpNum(MI.getDesc())); in convertToVLMAX() local
85 if (!VL.isReg()) in convertToVLMAX()
87 MachineInstr *Def = MRI->getVRegDef(VL.getReg()); in convertToVLMAX()
126 VL.ChangeToImmediate(RISCV::VLMaxSentinel); in convertToVLMAX()
H A DRISCVISelDAGToDAG.cpp67 SDValue VL = CurDAG->getRegister(RISCV::X0, Subtarget->getXLenVT()); in PreprocessISelDAG() local
72 Result = CurDAG->getNode(Opc, DL, VT, CurDAG->getUNDEF(VT), Src, VL); in PreprocessISelDAG()
84 SDValue VL = N->getOperand(3); in PreprocessISelDAG() local
115 VL}; in PreprocessISelDAG()
315 SDValue VL; in addVectorLoadStoreOperands() local
316 selectVLOp(Node->getOperand(CurOp++), VL); in addVectorLoadStoreOperands()
317 Operands.push_back(VL); in addVectorLoadStoreOperands()
1640 SDValue VL; in Select() local
1641 selectVLOp(Node->getOperand(3), VL); in Select()
1645 ReplaceNode(Node, CurDAG->getMachineNode(VMSetOpcode, DL, VT, VL, SEW)); in Select()
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/src/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVLegalizerInfo.cpp665 static MachineInstrBuilder buildAllOnesMask(LLT VecTy, const SrcOp &VL, in buildAllOnesMask() argument
669 return MIB.buildInstr(RISCV::G_VMSET_VL, {MaskTy}, {VL}); in buildAllOnesMask()
679 Register VL(RISCV::X0); in buildDefaultVLOps() local
680 MachineInstrBuilder Mask = buildAllOnesMask(VecTy, VL, MIB, MRI); in buildDefaultVLOps()
681 return {Mask, VL}; in buildDefaultVLOps()
686 Register Hi, Register VL, MachineIRBuilder &MIB, in buildSplatPartsS64WithVL() argument
697 {Passthru, Lo, Hi, VL}); in buildSplatPartsS64WithVL()
702 const SrcOp &Scalar, Register VL, in buildSplatSplitS64WithVL() argument
707 Unmerge.getReg(1), VL, MIB, MRI); in buildSplatSplitS64WithVL()
729 auto [_, VL] = buildDefaultVLOps(Dst, MIB, MRI); in legalizeSplatVector()
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/src/sys/contrib/device-tree/src/arm/marvell/
H A Dkirkwood-linkstation-lsvl.dts3 * Device Tree file for Buffalo Linkstation LS-VL
13 model = "Buffalo Linkstation LS-VL";
/src/contrib/llvm-project/llvm/include/llvm/CodeGen/PBQP/
H A DReductionRules.h152 unsigned VL = V.getLength(); in hasRegisterOptions() local
155 if (VL <= 1) in hasRegisterOptions()
160 for (unsigned i = 1; i < VL; ++i) in hasRegisterOptions()
/src/sys/contrib/device-tree/Bindings/sound/
H A Dcs43130.txt10 - VA-supply, VP-supply, VL-supply, VCP-supply, VD-supply:
57 VL-supply = <&dummy_vreg>;
H A Dcs42l42.txt9 - VP-supply, VCP-supply, VD_FILT-supply, VL-supply, VA-supply :
102 VL-supply = <&dummy_vreg>;
/src/contrib/llvm-project/clang/include/clang/Basic/
H A Driscv_vector.td257 (Address0, ..., Address{NF - 1}, Ptr, VL)
259 (Address0, ..., Address{NF - 1}, Mask, Ptr, VL)
262 Ptr, VL)
265 Ptr, VL)
273 (Address0, ..., Address{NF - 1}, Ptr, NewVL, VL)
275 (Address0, ..., Address{NF - 1}, Mask, Ptr, NewVL, VL)
278 Ptr, NewVL, VL)
281 Ptr, NewVL, VL)
286 (Address0, ..., Address{NF - 1}, Ptr, Stride, VL)
288 (Address0, ..., Address{NF - 1}, Mask, Ptr, Stride, VL)
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/src/contrib/llvm-project/clang/include/clang/AST/
H A DDeclOpenMP.h129 void setVars(ArrayRef<Expr *> VL);
134 ArrayRef<Expr *> VL);
493 void setVars(ArrayRef<Expr *> VL);
497 SourceLocation L, ArrayRef<Expr *> VL,
/src/contrib/llvm-project/llvm/lib/Analysis/
H A DVectorUtils.cpp841 Instruction *llvm::propagateMetadata(Instruction *Inst, ArrayRef<Value *> VL) { in propagateMetadata() argument
842 if (VL.empty()) in propagateMetadata()
844 Instruction *I0 = cast<Instruction>(VL[0]); in propagateMetadata()
853 for (int J = 1, E = VL.size(); MD && J != E; ++J) { in propagateMetadata()
854 const Instruction *IJ = cast<Instruction>(VL[J]); in propagateMetadata()
1539 SmallVector<Value *, 4> VL; in addMetadata() local
1540 std::transform(Members.begin(), Members.end(), std::back_inserter(VL), in addMetadata()
1542 propagateMetadata(NewInst, VL); in addMetadata()
/src/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrFormats.td46 /// VLIndex is the index of VL register in MI's operands. The HW instruction
48 /// For example, the index of VL of (VST $sy, $sz, $sx, $vl) is 3 (beginning
49 /// from 0), and the index of VL of (VST $sy, $sz, $sx, $vm, $vl) is 4. We
/src/contrib/llvm-project/llvm/include/llvm/IR/
H A DDominators.h87 BBDomTree::VerificationLevel VL);
89 BBPostDomTree::VerificationLevel VL);

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