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Searched refs:TEX_INST (Results 1 – 4 of 4) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600Defines.h41 TEX_INST = (1 << 13), enumerator
60 #define IS_TEX(desc) ((desc).TSFlags & R600_InstFlag::TEX_INST)
H A DR600OptimizeVectorRegisters.cpp138 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST) in canSwizzle()
246 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST) in SwizzleInput()
325 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST) { in runOnMachineFunction()
H A DR600InstrFormats.td290 bits<5> TEX_INST;
300 let Word0{4-0} = TEX_INST;
H A DR600Instructions.td933 let TEX_INST = inst{4-0};