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Searched refs:SDMMC2 (Results 1 – 12 of 12) sorted by relevance

/src/sys/contrib/device-tree/src/arm/st/
H A Dstm32f7-pinctrl.dtsi279 pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
280 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
281 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
282 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
283 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC2 CLK */
284 <STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */
292 pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
293 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
294 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
295 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
[all …]
H A Dstm32f746.dtsi513 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
H A Dstm32h743.dtsi401 resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>;
/src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Drda,8810pl-intc.txt22 4: SDMMC2
/src/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dstm32mp1-clks.h122 #define SDMMC2 109 macro
/src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-var-som.dtsi368 /* SDMMC2 CD/WP */
/src/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_per.c222 GATE(SDMMC2, "sdmmc2", "pc_sdmmc2", L(9)),
/src/sys/arm64/nvidia/tegra210/
H A Dtegra210_clk_per.c315 GATE(SDMMC2, "sdmmc2", "pc_sdmmc2", L(9)),
/src/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-asus-transformer-common.dtsi158 /* SDMMC2 pinmux */
H A Dtegra30-asus-p1801-t.dts164 /* SDMMC2 pinmux */
H A Dtegra30-asus-tf600t.dts115 /* SDMMC2 pinmux */
H A Dtegra30-pegatron-chagall.dts124 /* SDMMC2 pinmux */