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Searched refs:RK_PC2 (Results 1 – 25 of 89) sorted by relevance

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/src/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-pinctrl.dtsi83 <2 RK_PC2 1 &pcfg_pull_none>,
85 <4 RK_PC2 1 &pcfg_pull_none>;
236 <2 RK_PC2 9 &pcfg_pull_none_smt>;
304 <4 RK_PC2 11 &pcfg_pull_none>;
372 <2 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
406 <4 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
488 <4 RK_PC2 10 &pcfg_pull_none>;
499 <2 RK_PC2 10 &pcfg_pull_up>;
H A Drk3588-extra-pinctrl.dtsi83 <2 RK_PC2 1 &pcfg_pull_none>,
85 <4 RK_PC2 1 &pcfg_pull_none>;
237 <2 RK_PC2 9 &pcfg_pull_none_smt>;
305 <4 RK_PC2 11 &pcfg_pull_none>;
373 <2 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
407 <4 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
489 <4 RK_PC2 10 &pcfg_pull_none>;
500 <2 RK_PC2 10 &pcfg_pull_up>;
H A Dpx30-engicam-ctouch2.dtsi19 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
25 reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
H A Dpx30-engicam-px30-core-edimm2.2.dts26 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
42 gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
H A Drk3566-nanopi-r3s.dts40 gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
61 gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
415 reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
429 rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
443 rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
461 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
H A Drk3568-pinctrl.dtsi162 <3 RK_PC2 2 &pcfg_pull_none>,
218 <4 RK_PC2 3 &pcfg_pull_none>,
418 <0 RK_PC2 2 &pcfg_pull_none>;
446 <1 RK_PC2 1 &pcfg_pull_up_drv_level_2>,
523 <1 RK_PC2 2 &pcfg_pull_none>,
581 <2 RK_PC2 2 &pcfg_pull_none>;
1186 <3 RK_PC2 5 &pcfg_pull_none>;
1223 <2 RK_PC2 1 &pcfg_pull_none>;
1337 <4 RK_PC2 5 &pcfg_pull_none>;
1445 <3 RK_PC2 1 &pcfg_pull_none>;
[all …]
H A Drk3566-anbernic-rg-arc.dtsi71 enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
142 gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
200 <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3566-radxa-cm3-io.dts60 gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
108 snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
217 rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3399-rock960.dts26 gpios = <&gpio4 RK_PC2 0>;
88 <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3576-pinctrl.dtsi101 <4 RK_PC2 12 &pcfg_pull_none>;
348 <4 RK_PC2 1 &pcfg_pull_none>;
507 <3 RK_PC2 5 &pcfg_pull_none>;
540 <3 RK_PC2 7 &pcfg_pull_none>;
689 <3 RK_PC2 3 &pcfg_pull_none>;
780 <2 RK_PC2 3 &pcfg_pull_none>;
820 <2 RK_PC2 2 &pcfg_pull_none>,
920 <1 RK_PC2 1 &pcfg_pull_none>;
1022 <1 RK_PC2 6 &pcfg_pull_none>;
1231 <3 RK_PC2 6 &pcfg_pull_none>;
[all …]
H A Drk3566-anbernic-rg503.dts162 enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
252 gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
262 <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3566-anbernic-rg353ps.dts72 enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
104 <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3328-orangepi-r1-plus.dtsi52 gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
255 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
269 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3566-anbernic-rg353p.dts73 enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
116 <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3566-orangepi-3b-v1.1.dts27 reset-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
H A Drk3328-nanopi-r2s.dtsi26 reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
H A Drk3328-nanopi-r2.dtsi60 gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
291 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
305 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
H A Drk3328-orangepi-r1-plus.dts30 reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
H A Drk3328-nanopi-r2c.dtsi32 reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
H A Drk3328-nanopi-r2s-plus.dts45 reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
H A Drk3328-orangepi-r1-plus-lts.dts38 reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
H A Drk3562-pinctrl.dtsi353 <3 RK_PC2 1 &pcfg_pull_none_smt>,
478 <1 RK_PC2 3 &pcfg_pull_none>;
761 <3 RK_PC2 2 &pcfg_pull_none>;
1025 <0 RK_PC2 2 &pcfg_pull_none_drv_level_1>;
1096 <1 RK_PC2 4 &pcfg_pull_none_drv_level_1>;
1341 <1 RK_PC2 2 &pcfg_pull_none>;
1429 <1 RK_PC2 1 &pcfg_pull_up_drv_level_2>,
1504 <0 RK_PC2 3 &pcfg_pull_none_drv_level_3>;
1741 <0 RK_PC2 1 &pcfg_pull_none>;
2065 <3 RK_PC2 3 &pcfg_pull_up>;
H A Drk3318-a95x-z2.dts59 reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
254 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
/src/sys/contrib/device-tree/include/dt-bindings/pinctrl/
H A Drockchip.h30 #define RK_PC2 18 macro
/src/sys/contrib/device-tree/src/arm/rockchip/
H A Drv1126-pinctrl.dtsi95 <0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
277 <0 RK_PC2 3 &pcfg_pull_none>;
377 <2 RK_PC2 2 &pcfg_pull_none>,
503 <1 RK_PC2 1 &pcfg_pull_up>,

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