Searched refs:RHSExt (Results 1 – 4 of 4) sorted by relevance
| /src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 2240 auto RHSExt = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MI.getOperand(3)}); in widenScalarAddSubOverflow() local
2247 {LHSExt, RHSExt, *CarryIn}) in widenScalarAddSubOverflow()
2250 NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSExt, RHSExt}).getReg(0); in widenScalarAddSubOverflow()
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 4891 auto RHSExt = B.buildFPExt(S32, RHS, Flags); in legalizeFDIV16() local
4894 .addUse(RHSExt.getReg(0)) in legalizeFDIV16()
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| /src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 14751 std::optional<ExtKind> RHSExt; member
14761 const NodeExtensionHelper &RHS, std::optional<ExtKind> RHSExt) in CombineResult()
14762 : TargetOpcode(TargetOpcode), LHSExt(LHSExt), RHSExt(RHSExt), Root(Root), in CombineResult()
14787 RHS.getOrCreateExtendedOp(Root, DAG, Subtarget, RHSExt), in materialize()
15042 if (Res->RHSExt.has_value()) in combineBinOp_VLToVWBinOp_VL()
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| /src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 10707 SDValue RHSExt = DAG.getNode(Ext, dl, WideVT, RHS); in expandFixedPointMul() local
10708 SDValue Res = DAG.getNode(ISD::MUL, dl, WideVT, LHSExt, RHSExt); in expandFixedPointMul()
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