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Searched refs:QSPI_RESET (Results 1 – 10 of 10) sorted by relevance

/src/sys/contrib/device-tree/include/dt-bindings/reset/
H A Daltr,rst-mgr.h22 #define QSPI_RESET 37 macro
H A Daltr,rst-mgr-a10.h22 #define QSPI_RESET 38 macro
/src/sys/contrib/device-tree/Bindings/mtd/
H A Dcadence-quadspi.txt56 resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;
/src/sys/contrib/device-tree/Bindings/spi/
H A Dcadence-quadspi.txt57 resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;
/src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7-tqma7.dtsi200 /* #QSPI_RESET */
/src/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2lc-smarc-som.dtsi173 pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#";
H A Drzg2l-smarc-som.dtsi254 pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#";
/src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx95-tqma9596sa.dtsi232 "HUB_RST#", "QSPI_RESET#", "PCIE1_CLK_EN", "PCIE2_CLK_EN";
/src/sys/contrib/device-tree/src/arm/intel/socfpga/
H A Dsocfpga.dtsi801 resets = <&rst QSPI_RESET>;
H A Dsocfpga_arria10.dtsi777 resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;