Searched refs:PCLK_PWM0 (Results 1 – 13 of 13) sorted by relevance
| /src/sys/dev/clk/rockchip/ |
| H A D | rk3568_pmucru.c | 176 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_pdpmu", 1, 6),
|
| /src/sys/contrib/device-tree/src/arm/rockchip/ |
| H A D | rv1126.dtsi | 276 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 287 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 298 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 309 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
|
| /src/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | rk3308-cru.h | 185 #define PCLK_PWM0 206 macro
|
| H A D | rk3368-cru.h | 134 #define PCLK_PWM0 350 macro
|
| H A D | px30-cru.h | 162 #define PCLK_PWM0 339 macro
|
| H A D | rockchip,rk3528-cru.h | 122 #define PCLK_PWM0 110 macro
|
| H A D | rockchip,rv1126-cru.h | 48 #define PCLK_PWM0 35 macro
|
| H A D | rk3568-cru.h | 61 #define PCLK_PWM0 48 macro
|
| /src/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3528.dtsi | 794 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; 804 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; 814 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; 824 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
|
| H A D | rk3308.dtsi | 503 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; 514 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; 525 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; 536 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
|
| H A D | rk356x-base.dtsi | 421 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 432 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 443 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 454 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
|
| H A D | rk356x.dtsi | 502 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 513 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 524 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; 535 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
|
| H A D | px30.dtsi | 665 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; 676 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; 687 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; 698 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
|