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Searched refs:P8 (Results 1 – 24 of 24) sorted by relevance

/src/lib/msun/ld128/
H A Ds_exp2l.c55 P8 = 0x1.62c0223a5c7c7p-20, variable
416 + z * (P7 + z * (P8 + z * (P9 + z * P10))))))))); in exp2l()
H A Ds_logl.c103 P8 = -1.24999999999999994863289015033581301e-1L; /* -0x1fffffffffffffa13e91765e46140.0p-116L */ variable
550 d * (P4 + d * (P5 + d * (P6 + d * (P7 + d * (P8 + in k_logl()
658 d * (P4 + d * (P5 + d * (P6 + d * (P7 + d * (P8 + in log1pl()
/src/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-boneblue.dts125 …PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_…
126 …X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PI…
127 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, …
128 …AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32,…
129 …AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, B…
130 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, …
H A Dam43x-epos-evm.dts82 0x02010208 /* P8 */
/src/lib/msun/ld80/
H A Ds_logl.c108 P8 = -1.2518388626763144e-1; /* -0x1006068cc0b97c.0p-55 */ variable
539 val_lo = z * d * z * (z * (d * P8 + P7) + (d * P6 + P5)) + in k_logl()
648 val_lo = z * d * z * (z * (d * P8 + P7) + (d * P6 + P5)) + in log1pl()
H A Db_tgammal.c192 #define P8 (P8u.e) macro
211 z * (P6 + z * (P7 + z * P8))))))); in ratfun_gam()
/src/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-opal.txt23 a P8 on-chip bus.
/src/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini-sl93512r.dts209 pins = "P8 GMAC0 TXEN";
H A Dgemini-dlink-dns-313.dts251 pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
/src/crypto/openssl/test/
H A Dmodes_internal_test.c437 static const u8 P8[16]; variable
/src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP8.td1 //===-- PPCScheduleP8.td - PPC P8 Scheduling Definitions ---*- tablegen -*-===//
19 // TODO: Due to limitation of instruction definitions, non-P8 instructions
H A DPPCInstrVSX.td3305 // Although XSNEGDP is available in P7, we want to select it starting from P8,
3307 // XSNMSUBASP, is available since P8)
3621 // Endianness-neutral constant splat on P8 and newer targets. The reason
/src/contrib/sendmail/contrib/
H A Dmail.local.linux148 M`?"^A`O49.K.R<TH&5CQII=P8%N=POSQOMAGJ$3")9L-+HT,[*<F-<U@G]@2
163 M^0C9,LRB"5N9J45\F-018BS-B-EZ)J;/B(P_XR^@#)<0D?+Q2;P8'"D2-,5\
/src/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsPPC.def481 // P8 Crypto built-ins.
518 // P8 BCD builtins.
/src/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1589 case AArch64::P7: Reg = AArch64::P8; break; in getNextVectorRegister()
1590 case AArch64::P8: Reg = AArch64::P9; break; in getNextVectorRegister()
/src/contrib/googletest/googlemock/include/gmock/
H A Dgmock-more-actions.h503 P8
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedOryon.td155 // Load instructions on ports P6/P7/P8/P9.
H A DAArch64RegisterInfo.td846 def P8 : AArch64Reg<8, "p8", [PN8]>, DwarfRegAlias<PN8>;
H A DAArch64FrameLowering.cpp1033 AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, in emitZeroCallUsedRegs()
/src/contrib/file/magic/Magdir/
H A Dimages3079 >0 ulelong 113 P8
3728 >0 ulelong 7 P8
3934 >0 ubyte 0x0B P8
/src/share/misc/
H A Dpci_vendors13747 80b9 Harmonix Hi-Card P8 (4x active ISDN BRI)
13942 1043 8505 P8 series motherboard
30605 1043 84ca P8 series motherboard
30611 1043 844d P8 series motherboard
30631 1043 844d P8 series motherboard
30637 1043 844d P8 series motherboard
30640 1043 84ca P8 series motherboard
33269 1043 844d P8 series motherboard
33288 1043 844d P8 series motherboard
33307 1043 844d P8 series motherboard
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/src/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp2783 .Case("p8", AArch64::P8) in matchSVEPredicateVectorRegName()
/src/contrib/ncurses/misc/
H A Dterminfo.src19099 # More recent range of MDIS terminals, in which P7 and P8
19101 # The P9 has two emulation modes - P8 and ANSI - and includes a
19103 # P8 and P9 support 80c/24ln/8pg and 132cl/24li/4pg formats.
19158 # Includes early versions of P7 & P8.
19210 # Use p4 for very early models of P8.
19214 prism8|p8|P8|MDC Prism-8,
19225 prism8-w|p8-w|P8-W|MDC Prism-8 in 132 column mode,
19279 # p9-8: Prism-9 in P8 mode
19282 # P9 terminal in P8 emulation mode.
19286 prism9-8|p9-8|P9-8|MDC Prism-9 in P8 mode,
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/src/
H A DObsoleteFiles.inc5520 OLD_FILES+=usr/share/terminfo/P/P8
5521 OLD_FILES+=usr/share/terminfo/P/P8-W