Home
last modified time | relevance | path

Searched refs:NumRegisters (Results 1 – 5 of 5) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Support/
H A DARMWinEH.cpp16 uint8_t NumRegisters = RF.Reg(); in SavedRegisterMask() local
36 VFPMask |= (((1 << ((NumRegisters + 1) % 8)) - 1) << 8); in SavedRegisterMask()
38 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << 4); in SavedRegisterMask()
/src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp294 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in set() local
296 for (unsigned i = 0; i != NumRegisters; ++i) in set()
298 PHIReg += NumRegisters; in set()
577 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in getValueFromVirtualReg() local
578 for (unsigned i = 0, e = NumRegisters; i != e; ++i) in getValueFromVirtualReg()
H A DSelectionDAGBuilder.cpp11889 const unsigned NumRegisters = TLI.getNumRegisters(*DAG.getContext(), VT); in HandlePHINodesInSuccessorBlocks() local
11890 for (unsigned i = 0; i != NumRegisters; ++i) in HandlePHINodesInSuccessorBlocks()
11893 Reg += NumRegisters; in HandlePHINodesInSuccessorBlocks()
/src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp111 unsigned NumRegisters; in getRegisterTypeForCallingConv() local
112 std::tie(RegisterVT, NumRegisters) = in getRegisterTypeForCallingConv()
145 unsigned NumRegisters; in getNumRegistersForCallingConv() local
146 std::tie(RegisterVT, NumRegisters) = in getNumRegistersForCallingConv()
149 return NumRegisters; in getNumRegistersForCallingConv()
/src/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1453 unsigned NumRegisters = getVectorTypeBreakdownMVT(VT, IntermediateVT, in computeRegisterProperties() local
1455 NumRegistersForVT[i] = NumRegisters; in computeRegisterProperties()
1456 assert(NumRegistersForVT[i] == NumRegisters && in computeRegisterProperties()