Searched refs:NextBit (Results 1 – 6 of 6) sorted by relevance
| /src/contrib/llvm-project/llvm/include/llvm/Bitcode/ |
| H A D | BitcodeCommon.h | 26 using UsedWithInAlloca = Bitfield::Element<bool, AlignLower::NextBit, 1>; 27 using ExplicitType = Bitfield::Element<bool, UsedWithInAlloca::NextBit, 1>; 28 using SwiftError = Bitfield::Element<bool, ExplicitType::NextBit, 1>; 29 using AlignUpper = Bitfield::Element<unsigned, SwiftError::NextBit, 3>;
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| /src/contrib/llvm-project/llvm/include/llvm/Bitstream/ |
| H A D | BitstreamReader.h | 242 unsigned NextBit = 0; in ReadVBR() local 244 Result |= (Piece & (Mask - 1)) << NextBit; in ReadVBR() 249 NextBit += NumBits-1; in ReadVBR() 250 if (NextBit >= 32) in ReadVBR() 276 unsigned NextBit = 0; in ReadVBR64() local 278 Result |= uint64_t(Piece & (Mask - 1)) << NextBit; in ReadVBR64() 283 NextBit += NumBits-1; in ReadVBR64() 284 if (NextBit >= 64) in ReadVBR64()
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| /src/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | Bitfields.h | 231 static constexpr unsigned NextBit = Shift + Bits; 283 return A::NextBit == B::FirstBit && areContiguous<B, Others...>();
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| /src/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Instructions.h | 65 using UsedWithInAllocaField = BoolBitfieldElementT<AlignmentField::NextBit>; 66 using SwiftErrorField = BoolBitfieldElementT<UsedWithInAllocaField::NextBit>; 176 using AlignmentField = AlignmentBitfieldElementT<VolatileField::NextBit>; 177 using OrderingField = AtomicOrderingBitfieldElementT<AlignmentField::NextBit>; 292 using AlignmentField = AlignmentBitfieldElementT<VolatileField::NextBit>; 293 using OrderingField = AtomicOrderingBitfieldElementT<AlignmentField::NextBit>; 522 using WeakField = BoolBitfieldElementT<VolatileField::NextBit>; 524 AtomicOrderingBitfieldElementT<WeakField::NextBit>; 526 AtomicOrderingBitfieldElementT<SuccessOrderingField::NextBit>; 528 AlignmentBitfieldElementT<FailureOrderingField::NextBit>; [all …]
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| H A D | InstrTypes.h | 1241 Bitfield::Element<CallingConv::ID, CallInstReservedField::NextBit, 10,
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| /src/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.cpp | 1609 unsigned NextBit = 0; in computeSubRegLaneMasks() local 1615 unsigned SrcBit = NextBit; in computeSubRegLaneMasks() 1617 if (NextBit < LaneBitmask::BitWidth - 1) in computeSubRegLaneMasks() 1618 ++NextBit; in computeSubRegLaneMasks()
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