| /src/contrib/llvm-project/llvm/lib/Option/ |
| H A D | ArgList.cpp | 72 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier Neg, bool Default) const { in hasFlag() argument
73 if (Arg *A = getLastArg(Pos, Neg)) in hasFlag()
78 bool ArgList::hasFlagNoClaim(OptSpecifier Pos, OptSpecifier Neg, in hasFlagNoClaim() argument
80 if (Arg *A = getLastArgNoClaim(Pos, Neg)) in hasFlagNoClaim()
85 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg, in hasFlag() argument
87 if (Arg *A = getLastArg(Pos, PosAlias, Neg)) in hasFlag()
105 OptSpecifier Neg) const { in addOptInFlag()
106 if (Arg *A = getLastArg(Pos, Neg)) in addOptInFlag()
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| /src/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | APFloat.h | 546 void makeLargest(bool Neg = false);
547 void makeSmallest(bool Neg = false);
548 void makeNaN(bool SNaN = false, bool Neg = false,
550 void makeInf(bool Neg = false);
551 void makeZero(bool Neg = false);
756 void makeInf(bool Neg);
757 void makeZero(bool Neg);
758 void makeLargest(bool Neg);
759 void makeSmallest(bool Neg);
760 void makeSmallestNormalized(bool Neg);
[all …]
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| /src/contrib/llvm-project/llvm/include/llvm/Option/ |
| H A D | ArgList.h | 301 bool hasFlag(OptSpecifier Pos, OptSpecifier Neg, bool Default) const;
302 bool hasFlagNoClaim(OptSpecifier Pos, OptSpecifier Neg, bool Default) const;
308 bool hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg,
314 OptSpecifier Neg) const;
317 OptSpecifier Neg) const { in addOptOutFlag() argument
318 addOptInFlag(Output, Neg, Pos); in addOptOutFlag()
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| /src/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 287 static BinaryOperator *LowerNegateToMultiply(Instruction *Neg) { in LowerNegateToMultiply() argument
288 assert((isa<UnaryOperator>(Neg) || isa<BinaryOperator>(Neg)) && in LowerNegateToMultiply()
291 unsigned OpNo = isa<BinaryOperator>(Neg) ? 1 : 0; in LowerNegateToMultiply()
292 Type *Ty = Neg->getType(); in LowerNegateToMultiply()
297 CreateMul(Neg->getOperand(OpNo), NegOne, "", Neg->getIterator(), Neg); in LowerNegateToMultiply()
298 Neg->setOperand(OpNo, Constant::getNullValue(Ty)); // Drop use of op. in LowerNegateToMultiply()
299 Res->takeName(Neg); in LowerNegateToMultiply()
300 Neg->replaceAllUsesWith(Res); in LowerNegateToMultiply()
301 Res->setDebugLoc(Neg->getDebugLoc()); in LowerNegateToMultiply()
501 Instruction *Neg; in LinearizeExprTree() local
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| /src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 295 bool Neg = false; member
298 ExtExpr(Register RS, bool NG, unsigned SH) : Rs(RS), S(SH), Neg(NG) {} in ExtExpr()
304 return Rs == Ex.Rs && S == Ex.S && Neg == Ex.Neg; in operator ==()
314 return !Neg && Ex.Neg; in operator <()
469 OS << "## " << (P.Ex.Neg ? "- " : "+ "); in operator <<()
1208 ED.Expr.Neg = true; in recordExtender()
1212 ED.Expr.Neg = true; in recordExtender()
1545 assert(!Ex.Neg && "Cannot subtract a stack slot"); in insertInitializer()
1557 if (Ex.Neg) { in insertInitializer()
1570 unsigned NewOpc = Ex.Neg ? Hexagon::S4_subi_asl_ri in insertInitializer()
[all …]
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| /src/usr.sbin/ppp/ |
| H A D | ccp.c | 186 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg])) in ccp_ReportStatus()
303 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg]) && in ccp_Required()
359 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg]) && in CcpSendConfigReq()
506 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg]) && in CcpLayerUp()
540 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg])) in CcpLayerUp()
604 if (IsAccepted(ccp->cfg.neg[algorithm[f]->Neg]) && in CcpDecodeConfig()
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| H A D | ccp.h | 125 int Neg; /* ccp_config neg array item */ member
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| /src/contrib/llvm-project/clang/include/clang/Analysis/Analyses/ |
| H A D | ThreadSafety.h | 205 virtual void handleNegativeNotHeld(StringRef Kind, Name LockName, Name Neg, in handleNegativeNotHeld() argument
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| H A D | ThreadSafetyCommon.h | 282 CapabilityExpr(const til::SExpr *E, StringRef Kind, bool Neg) in CapabilityExpr() argument
283 : CapExpr(E, Neg), CapKind(Kind) {} in CapabilityExpr()
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| /src/contrib/llvm-project/clang/lib/Analysis/ |
| H A D | ThreadSafetyCommon.cpp | 190 bool Neg = false; in translateAttrExpr() local
193 Neg = true; in translateAttrExpr()
199 Neg = true; in translateAttrExpr()
216 return CapabilityExpr(CE->expr(), Kind, Neg); in translateAttrExpr()
218 return CapabilityExpr(E, Kind, Neg); in translateAttrExpr()
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| H A D | ThreadSafety.cpp | 994 if (const FactEntry *Neg = FSet.findLock(FactMan, !Cp)) in unlock() local
995 PrevLoc = Neg->loc(); in unlock()
1039 Expr *BrE, bool Neg);
1306 if (const FactEntry *Neg = FSet.findLock(FactMan, !Cp)) in removeLock() local
1307 PrevLoc = Neg->loc(); in removeLock()
1362 Expr *BrE, bool Neg) { in getMutexIDs() argument
1371 if (Neg) in getMutexIDs()
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 122 bool Neg; member in __anon212399250111::SDWASrcOperand
130 SrcSel(SrcSel_), Abs(Abs_), Neg(Neg_), Sext(Sext_) {} in SDWASrcOperand()
139 bool getNeg() const { return Neg; } in getNeg()
325 if (Abs || Neg) { in getSrcMods()
329 Mods ^= Neg ? SISrcMods::NEG : 0u; in getSrcMods()
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| H A D | R600ISelLowering.h | 111 SDValue &Neg, SDValue &Abs, SDValue &Sel, SDValue &Imm,
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| H A D | R600ISelLowering.cpp | 1944 SDValue &Src, SDValue &Neg, SDValue &Abs, in FoldOperand() argument
1953 if (!Neg.getNode()) in FoldOperand()
1956 Neg = DAG.getTargetConstant(1, SDLoc(ParentNode), MVT::i32); in FoldOperand()
2117 SDValue &Neg = Ops[NegIdx[i] - 1]; in PostISelFolding() local
2124 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, FakeOp, DAG)) in PostISelFolding()
2155 SDValue &Neg = Ops[NegIdx[i] - 1]; in PostISelFolding() local
2167 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, Imm, DAG)) in PostISelFolding()
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| H A D | AMDGPUISelLowering.cpp | 2359 SDValue Neg = DAG.getNode(ISD::FNEG, SL, VT, Trunc, Flags); in LowerFREM() local
2361 return DAG.getNode(ISD::FMA, SL, VT, Neg, Y, X, Flags); in LowerFREM()
4876 SDValue Neg = DAG.getNode(ISD::FNEG, SL, VT, Res); in performFNegCombine() local
4877 DAG.ReplaceAllUsesWith(N0, Neg); in performFNegCombine()
4879 for (SDNode *U : Neg->uses()) in performFNegCombine()
4908 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc); in performFNegCombine() local
4909 return DAG.getNode(Opc, SL, VT, Neg, N0->getFlags()); in performFNegCombine()
4924 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc); in performFNegCombine() local
4925 return DAG.getNode(ISD::FP_ROUND, SL, VT, Neg, N0.getOperand(1)); in performFNegCombine()
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| /src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 279 MachineSDNode *Neg = in selectShiftMask() local
281 ShAmt = SDValue(Neg, 0); in selectShiftMask()
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| /src/contrib/llvm-project/llvm/lib/Support/ |
| H A D | APFloat.cpp | 5051 void DoubleAPFloat::makeInf(bool Neg) { in makeInf() argument
5052 Floats[0].makeInf(Neg); in makeInf()
5056 void DoubleAPFloat::makeZero(bool Neg) { in makeZero() argument
5057 Floats[0].makeZero(Neg); in makeZero()
5061 void DoubleAPFloat::makeLargest(bool Neg) { in makeLargest() argument
5065 if (Neg) in makeLargest()
5069 void DoubleAPFloat::makeSmallest(bool Neg) { in makeSmallest() argument
5071 Floats[0].makeSmallest(Neg); in makeSmallest()
5075 void DoubleAPFloat::makeSmallestNormalized(bool Neg) { in makeSmallestNormalized() argument
5078 if (Neg) in makeSmallestNormalized()
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| /src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 108 Value *Neg = Builder.CreateNeg(OtherOp, "", HasAnyNoWrap); in foldMulSelectToNegate() local
109 return Builder.CreateSelect(Cond, OtherOp, Neg); in foldMulSelectToNegate()
116 Value *Neg = Builder.CreateNeg(OtherOp, "", HasAnyNoWrap); in foldMulSelectToNegate() local
117 return Builder.CreateSelect(Cond, Neg, OtherOp); in foldMulSelectToNegate()
404 Value *Neg = dyn_castNegVal(Y); in visitMul() local
406 (Div->getOperand(1) == Y || Div->getOperand(1) == Neg) && in visitMul()
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| H A D | InstCombineShifts.cpp | 736 auto *Neg = BinaryOperator::CreateNeg(I->getOperand(0)); in getShiftedValue() local
737 IC.InsertNewInstWith(Neg, I->getIterator()); in getShiftedValue()
740 auto *And = BinaryOperator::CreateAnd(Neg, in getShiftedValue()
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| /src/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYConstantIslandPass.cpp | 147 CPUser(MachineInstr *Mi, MachineInstr *Cpemi, unsigned Maxdisp, bool Neg) in CPUser()
148 : MI(Mi), CPEMI(Cpemi), MaxDisp(Maxdisp), NegOk(Neg) { in CPUser()
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| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 78 bool Neg = false; member
82 bool hasFPModifiers() const { return Abs || Neg; } in hasFPModifiers()
89 Operand |= Neg ? SISrcMods::NEG : 0u; in getFPModifiersOperand()
1202 OS << "abs:" << Mods.Abs << " neg: " << Mods.Neg << " sext:" << Mods.Sext; in operator <<()
2200 if (Imm.Mods.Neg) { in applyInputFPModifiers()
3332 bool Neg, SP3Neg; in parseRegOrImmWithFPInputMods() local
3344 Neg = trySkipId("neg"); in parseRegOrImmWithFPInputMods()
3345 if (Neg && SP3Neg) in parseRegOrImmWithFPInputMods()
3347 if (Neg && !skipToken(AsmToken::LParen, "expected left paren after neg")) in parseRegOrImmWithFPInputMods()
3370 return (SP3Neg || Neg || SP3Abs || Abs || Lit) ? ParseStatus::Failure : Res; in parseRegOrImmWithFPInputMods()
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| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 4414 SDValue Neg = variable
4416 if (!Neg)
4420 return Neg;
4423 if (Neg->use_empty())
4424 DAG.RemoveDeadNode(Neg.getNode());
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| /src/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | Opcodes.td | 592 def Neg: Opcode {
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| /src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5437 SDValue Neg = DAG.getNegative(Src, DL, VT); in lowerCTLZ_CTTZ_ZERO_UNDEF() local
5438 Src = DAG.getNode(ISD::AND, DL, VT, Src, Neg); in lowerCTLZ_CTTZ_ZERO_UNDEF()
5440 SDValue Neg = DAG.getNode(ISD::VP_SUB, DL, VT, DAG.getConstant(0, DL, VT), in lowerCTLZ_CTTZ_ZERO_UNDEF() local
5442 Src = DAG.getNode(ISD::VP_AND, DL, VT, Src, Neg, Mask, VL); in lowerCTLZ_CTTZ_ZERO_UNDEF()
7570 SDValue Neg = DAG.getNegative(CondV, DL, VT); in combineSelectToBinOp() local
7571 return DAG.getNode(ISD::OR, DL, VT, Neg, DAG.getFreeze(FalseV)); in combineSelectToBinOp()
7575 SDValue Neg = DAG.getNode(ISD::ADD, DL, VT, CondV, in combineSelectToBinOp() local
7577 return DAG.getNode(ISD::OR, DL, VT, Neg, DAG.getFreeze(TrueV)); in combineSelectToBinOp()
7582 SDValue Neg = DAG.getNode(ISD::ADD, DL, VT, CondV, in combineSelectToBinOp() local
7584 return DAG.getNode(ISD::AND, DL, VT, Neg, DAG.getFreeze(FalseV)); in combineSelectToBinOp()
[all …]
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| /src/contrib/llvm-project/clang/lib/Sema/ |
| H A D | AnalysisBasedWarnings.cpp | 2041 void handleNegativeNotHeld(StringRef Kind, Name LockName, Name Neg, in handleNegativeNotHeld() argument
2045 << Kind << LockName << Neg); in handleNegativeNotHeld()
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