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/src/sys/contrib/device-tree/Bindings/usb/
H A Dnvidia,tegra124-xusb.txt9 - compatible: Must be:
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
16 - reg-names: Must contain the following entries:
20 - interrupts: Must contain the xHCI host interrupt and the mailbox interrupt.
21 - clocks: Must contain an entry for each entry in clock-names.
23 - clock-names: Must include the following entries:
35 - resets: Must contain an entry for each entry in reset-names.
37 - reset-names: Must include the following entries:
46 - avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
47 - dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
[all …]
/src/sys/contrib/device-tree/Bindings/clock/
H A Dpistachio-clock.txt24 - compatible: Must be "img,pistachio-clk".
25 - reg: Must contain the base address and length of the core clock controller.
26 - #clock-cells: Must be 1. The single cell is the clock identifier.
28 - clocks: Must contain an entry for each clock in clock-names.
29 - clock-names: Must include "xtal" (see "External clocks") and
52 - compatible: Must be "img,pistachio-periph-clk".
53 - reg: Must contain the base address and length of the peripheral clock
55 - #clock-cells: Must be 1. The single cell is the clock identifier.
57 - clocks: Must contain an entry for each clock in clock-names.
58 - clock-names: Must include "periph_sys", the peripheral system clock generated
[all …]
/src/sys/contrib/device-tree/Bindings/spi/
H A Dspi-img-spfi.txt4 - compatible: Must be "img,spfi".
5 - reg: Must contain the base address and length of the SPFI registers.
6 - interrupts: Must contain the SPFI interrupt.
7 - clocks: Must contain an entry for each entry in clock-names.
9 - clock-names: Must include the following entries:
12 - dmas: Must contain an entry for each entry in dma-names.
14 - dma-names: Must include the following entries:
17 - cs-gpios: Must specify the GPIOs used for chipselect lines.
18 - #address-cells: Must be 1.
19 - #size-cells: Must be 0.
H A Dqcom,spi-geni-qcom.txt11 - compatible: Must contain "qcom,geni-spi".
12 - reg: Must contain SPI register location and length.
13 - interrupts: Must contain SPI controller interrupts.
14 - clock-names: Must contain "se".
16 - #address-cells: Must be <1> to define a chip select address on
18 - #size-cells: Must be <0>.
H A Dnvidia,tegra20-sflash.txt7 - clocks : Must contain one entry, for the module clock.
9 - resets : Must contain an entry for each entry in reset-names.
11 - reset-names : Must include the following entries:
13 - dmas : Must contain an entry for each entry in clock-names.
15 - dma-names : Must include the following entries:
H A Dnvidia,tegra20-slink.txt7 - clocks : Must contain one entry, for the module clock.
9 - resets : Must contain an entry for each entry in reset-names.
11 - reset-names : Must include the following entries:
13 - dmas : Must contain an entry for each entry in clock-names.
15 - dma-names : Must include the following entries:
/src/sys/contrib/device-tree/Bindings/media/
H A Dnvidia,tegra-vde.txt4 - compatible : Must contain one of the following values:
10 - reg : Must contain an entry for each entry in reg-names.
11 - reg-names : Must include the following entries:
21 - iram : Must contain phandle to the mmio-sram device node that represents
23 - interrupts : Must contain an entry for each entry in interrupt-names.
24 - interrupt-names : Must include the following entries:
28 - clocks : Must include the following entries:
30 - resets : Must contain an entry for each entry in reset-names.
35 - resets : Must contain an entry for each entry in reset-names.
36 - reset-names : Must include the following entries:
[all …]
/src/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra20-host1x.txt16 - clocks: Must contain one entry, for the module clock.
18 - resets: Must contain an entry for each entry in reset-names.
20 - reset-names: Must include the following entries:
49 - clocks: Must contain one entry, for the module clock.
51 - resets: Must contain an entry for each entry in reset-names.
53 - reset-names: Must include the following entries:
57 - interconnects: Must contain entry for the MPE memory clients.
58 - interconnect-names: Must include name of the interconnect path for each
70 - clocks: clocks: Must contain one entry, for the module clock.
73 - resets: Must contain an entry for each entry in reset-names.
[all …]
/src/sys/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra20-pcie.txt4 - compatible: Must be:
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
15 registers. Must contain an entry for each entry in the reg-names property.
16 - reg-names: Must include the following entries:
20 - interrupts: A list of interrupt outputs of the controller. Must contain an
22 - interrupt-names: Must include the following entries:
54 - clocks: Must contain an entry for each entry in clock-names.
56 - clock-names: Must include the following entries:
61 - resets: Must contain an entry for each entry in reset-names.
[all …]
H A Dfsl,imx6q-pcie.txt14 - interrupts: A list of interrupt outputs of the controller. Must contain an
16 - interrupt-names: Must include the following entries:
18 - clock-names: Must include the following additional entries:
27 - fsl,max-link-speed: Specify PCI gen for link capability. Must be '2' for
46 - clock names: Must include the following additional entries:
48 - power-domains: Must be set to phandles pointing to the DISPLAY and
50 - power-domain-names: Must be "pcie", "pcie_phy"
53 - power-domains: Must be set to a phandle pointing to PCIE_PHY power domain
54 - resets: Must contain phandles to PCIe-related reset lines exposed by SRC
56 - reset-names: Must contain the following entries:
[all …]
H A Drockchip-pcie-ep.txt6 - reg-names: Must include the following names
9 - clocks: Must contain an entry for each entry in clock-names.
11 - clock-names: Must include the following entries:
16 - resets: Must contain seven entries for each entry in reset-names.
18 - reset-names: Must include the following names
28 - phys: Must contain an phandle to a PHY for each entry in phy-names.
29 - phy-names: Must include 4 entries for all 4 lanes even if some of
/src/sys/contrib/device-tree/Bindings/phy/
H A Dpistachio-usb-phy.txt6 - compatible: Must be "img,pistachio-usb-phy".
7 - #phy-cells: Must be 0. See ./phy-bindings.txt for details.
8 - clocks: Must contain an entry for each entry in clock-names.
10 - clock-names: Must include "usb_phy".
11 - img,cr-top: Must contain a phandle to the CR_TOP syscon node.
17 - phy-supply: USB VBUS supply. Must supply 5.0V.
H A Dphy-cadence-sierra.txt5 - compatible: Must be "cdns,sierra-phy-t0" for Sierra in Cadence platform
6 Must be "ti,sierra-phy-t0" for Sierra in TI's J721E SoC.
7 - resets: Must contain an entry for each in reset-names.
9 - reset-names: Must include "sierra_reset" and "sierra_apb".
14 - #address-cells: Must be 1
15 - #size-cells: Must be 0
18 - clocks: Must contain an entry in clock-names.
20 - clock-names: Must contain "cmn_refclk_dig_div" and
37 - resets: Must contain one entry which controls the reset line for the
H A Dnvidia,tegra124-xusb-padctl.txt35 - compatible: Must be:
42 - resets: Must contain an entry for each entry in reset-names.
43 - reset-names: Must include the following entries:
47 - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
48 - avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
49 - avdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
50 - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.
53 - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
54 - avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
55 - dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
[all …]
/src/sys/contrib/device-tree/Bindings/dma/
H A Dimg-mdc-dma.txt4 - compatible: Must be "img,pistachio-mdc-dma".
5 - reg: Must contain the base address and length of the MDC registers.
6 - interrupts: Must contain all the per-channel DMA interrupts.
7 - clocks: Must contain an entry for each entry in clock-names.
9 - clock-names: Must include the following entries:
11 - img,cr-periph: Must contain a phandle to the peripheral control syscon
13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
16 - #dma-cells: Must be 3:
H A Dadi,axi-dmac.txt4 - compatible: Must be "adi,axi-dmac-1.00.a".
8 - #dma-cells: Must be 1.
16 - #size-cells: Must be 0
17 - #address-cells: Must be 1
24 adi,destination-bus-type: Type of the source or destination bus. Must be one
32 - adi,cyclic: Must be set if the channel supports hardware cyclic DMA
34 - adi,2d: Must be set if the channel supports hardware 2D DMA transfers.
/src/sys/contrib/device-tree/Bindings/mips/img/
H A Dpistachio.txt6 - compatible: Must include "img,pistachio".
11 - #address-cells: Must be 1.
12 - #size-cells: Must be 0.
16 - device_type: Must be "cpu".
17 - compatible: Must be "mti,interaptiv".
19 - clocks: Must include the CPU clock. See ../../clock/clock-bindings.txt for
/src/sys/contrib/device-tree/Bindings/ata/
H A Dnvidia,tegra124-ahci.txt4 - compatible : Must be one of:
12 - clocks : Must contain an entry for each entry in clock-names.
14 - clock-names : Must include the following entries:
17 - resets : Must contain an entry for each entry in reset-names.
19 - reset-names : Must include the following entries:
23 - phys : Must contain an entry for each entry in phy-names.
25 - phy-names : Must include the following entries:
/src/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-synquacer.txt4 - compatible : Must be "socionext,synquacer-i2c"
7 - #address-cells : Must be <1>;
8 - #size-cells : Must be <0>;
9 - clock-names : Must contain "pclk".
10 - clocks : Must contain an entry for each name in clock-names.
H A Di2c-axxia.txt4 - compatible : Must be "lsi,api2c"
7 - #address-cells : Must be <1>;
8 - #size-cells : Must be <0>;
9 - clock-names : Must contain "i2c".
10 - clocks: Must contain an entry for each name in clock-names. See the common
/src/sys/contrib/device-tree/Bindings/sound/
H A Dnvidia,tegra20-i2s.txt7 - resets : Must contain an entry for each entry in reset-names.
9 - reset-names : Must include the following entries:
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
16 - clocks : Must contain one entry, for the module clock.
H A Dnvidia,tegra20-ac97.txt7 - resets : Must contain an entry for each entry in reset-names.
9 - reset-names : Must include the following entries:
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
16 - clocks : Must contain one entry, for the module clock.
H A Dqcom,lpass-cpu.txt8 - clocks : Must contain an entry for each entry in clock-names.
22 - interrupts : Must contain an entry for each entry in
29 - pinctrl-names : Must contain a "default" entry.
30 - reg : Must contain an address for each entry in reg-names.
33 - #address-cells : Must be 1
34 - #size-cells : Must be 0
46 - reg : Must be one of the DAI IDs
/src/sys/contrib/device-tree/Bindings/memory-controllers/
H A Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
33 - #address-cells: Must be 2.
35 - #size-cells: Must be 1.
47 - mpmc,memory-width: Width of the chip select memory. Must be equal to
/src/sys/contrib/device-tree/Bindings/mips/pic32/
H A Dmicrochip,pic32mzda.txt10 - #address-cells: Must be 1.
11 - #size-cells: Must be 0.
13 - device_type: Must be "cpu".
14 - compatible: Must be "mti,mips14KEc".

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