| /src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveRegUnits.cpp | 46 for (const MachineOperand &MOP : MI.operands()) { in stepBackward() local
47 if (MOP.isReg()) { in stepBackward()
48 if (MOP.isDef() && MOP.getReg().isPhysical()) in stepBackward()
49 removeReg(MOP.getReg()); in stepBackward()
53 if (MOP.isRegMask()) { in stepBackward()
54 removeRegsNotPreserved(MOP.getRegMask()); in stepBackward()
60 for (const MachineOperand &MOP : MI.operands()) { in stepBackward() local
61 if (!MOP.isReg() || !MOP.readsReg()) in stepBackward()
64 if (MOP.getReg().isPhysical()) in stepBackward()
65 addReg(MOP.getReg()); in stepBackward()
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| H A D | LivePhysRegs.cpp | 46 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) { in removeDefs() local
47 if (MOP.isRegMask()) { in removeDefs()
48 removeRegsInMask(MOP); in removeDefs()
52 if (MOP.isDef()) in removeDefs()
53 removeReg(MOP.getReg()); in removeDefs()
59 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) { in addUses() local
60 if (!MOP.isReg() || !MOP.readsReg()) in addUses()
62 addReg(MOP.getReg()); in addUses()
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| H A D | MachineOutliner.cpp | 934 for (MachineOperand &MOP : MI->operands()) { in outline()
936 if (!MOP.isReg()) in outline()
939 if (MOP.isDef()) { in outline()
941 DefRegs.insert(MOP.getReg()); in outline()
942 if (UseRegs.count(MOP.getReg()) && in outline()
943 !InstrUseRegs.count(MOP.getReg())) in outline()
946 UseRegs.erase(MOP.getReg()); in outline()
947 } else if (!MOP.isUndef()) { in outline()
950 UseRegs.insert(MOP.getReg()); in outline()
951 InstrUseRegs.insert(MOP.getReg()); in outline()
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| H A D | TargetInstrInfo.cpp | 1868 for (const MachineOperand &MOP : MI.operands()) { in getOutliningType() local
1873 assert(!MOP.isTargetIndex() && "This isn't used quite yet!"); in getOutliningType()
1876 assert(!MOP.isCFIIndex() && "CFI instructions handled elsewhere!"); in getOutliningType()
1879 assert(!MOP.isFI() && "FrameIndex instructions should be gone by now!"); in getOutliningType()
1881 if (MOP.isMBB() || MOP.isBlockAddress() || MOP.isCPI() || MOP.isJTI()) in getOutliningType()
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| H A D | MachineCSE.cpp | 312 for (const auto &MOP : llvm::enumerate(MI->operands())) { in hasLivePhysRegDefUses() local
313 const MachineOperand &MO = MOP.value(); in hasLivePhysRegDefUses()
328 PhysDefs.push_back(std::make_pair(MOP.index(), Reg)); in hasLivePhysRegDefUses()
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| H A D | LiveIntervals.cpp | 1132 for (MachineOperand &MOP : mi_bundle_ops(*KillMI)) in handleMoveDown()
1133 if (MOP.isReg() && MOP.isUse()) in handleMoveDown()
1134 MOP.setIsKill(false); in handleMoveDown()
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| H A D | MachineVerifier.cpp | 2899 for (const MachineOperand &MOP : MI->uses()) { in checkLiveness() local
2900 if (!MOP.isReg() || !MOP.isImplicit()) in checkLiveness()
2903 if (!MOP.getReg().isPhysical()) in checkLiveness()
2906 if (llvm::is_contained(TRI->subregs(MOP.getReg()), Reg)) in checkLiveness()
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| /src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 833 bool isDef = any_of(I.operands(), [DefReg, TRI](MachineOperand &MOP) { in forAllMIsUntilDef() argument
834 return MOP.isReg() && MOP.isDef() && !MOP.isDebug() && MOP.getReg() && in forAllMIsUntilDef()
835 TRI->regsOverlap(MOP.getReg(), DefReg); in forAllMIsUntilDef()
848 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) in updateDefinedRegisters() local
849 if (MOP.isReg() && MOP.isKill()) in updateDefinedRegisters()
850 Units.removeReg(MOP.getReg()); in updateDefinedRegisters()
852 for (const MachineOperand &MOP : phys_regs_and_masks(MI)) in updateDefinedRegisters() local
853 if (MOP.isReg() && !MOP.isKill()) in updateDefinedRegisters()
854 Units.addReg(MOP.getReg()); in updateDefinedRegisters()
901 MachineOperand &MOP = MI.getOperand(OpIdx); in mergePairedInsns() local
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| H A D | AArch64ExpandPseudoInsts.cpp | 807 const MachineOperand &MOP = MBBI->getOperand(RegMaskStartIdx); in createCallWithOps() local
808 assert(MOP.isReg() && "can only add register operands"); in createCallWithOps()
810 MOP.getReg(), /*Def=*/false, /*Implicit=*/true, /*isKill=*/false, in createCallWithOps()
811 /*isDead=*/false, /*isUndef=*/MOP.isUndef())); in createCallWithOps()
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| H A D | AArch64InstrInfo.cpp | 8918 for (const MachineOperand &MOP : MI.operands()) { in getOutliningTypeImpl() local
8921 assert(!MOP.isCFIIndex()); in getOutliningTypeImpl()
8924 if (MOP.isReg() && !MOP.isImplicit() && in getOutliningTypeImpl()
8925 (MOP.getReg() == AArch64::LR || MOP.getReg() == AArch64::W30)) in getOutliningTypeImpl()
8952 for (const MachineOperand &MOP : MI.operands()) { in getOutliningTypeImpl() local
8953 if (MOP.isGlobal()) { in getOutliningTypeImpl()
8954 Callee = dyn_cast<Function>(MOP.getGlobal()); in getOutliningTypeImpl()
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| H A D | AArch64SchedNeoverseN1.td | 35 // stages. A MOP can be split into one or more micro-ops further down the
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| H A D | AArch64SchedNeoverseV1.td | 39 // stages. A MOP can be split into one or more micro-ops further down the
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| H A D | AArch64SchedNeoverseN2.td | 29 // stages. A MOP can be split into two micro-ops further down the pipeline
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| H A D | AArch64SchedNeoverseV2.td | 33 // stages. A MOP can be split into two micro-ops further down the pipeline
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| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveRegUnits.h | 167 auto Pred = [](const MachineOperand &MOP) { in phys_regs_and_masks()
168 return MOP.isRegMask() || in phys_regs_and_masks()
169 (MOP.isReg() && !MOP.isDebug() && MOP.getReg().isPhysical()); in phys_regs_and_masks()
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| /src/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/Orc/ |
| H A D | MachOPlatform.h | 90 unique_function<std::unique_ptr<MaterializationUnit>(MachOPlatform &MOP,
95 buildSimpleMachOHeaderMU(MachOPlatform &MOP, HeaderOptions Opts);
385 SimpleMachOHeaderMU(MachOPlatform &MOP, SymbolStringPtr HeaderStartSymbol,
395 MachOPlatform &MOP; variable
410 createHeaderInterface(MachOPlatform &MOP,
416 MachOPlatform::buildSimpleMachOHeaderMU(MachOPlatform &MOP, in buildSimpleMachOHeaderMU() argument
418 return std::make_unique<SimpleMachOHeaderMU>(MOP, MOP.MachOHeaderStartSymbol, in buildSimpleMachOHeaderMU()
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| /src/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/ |
| H A D | MachOPlatform.cpp | 98 std::unique_ptr<jitlink::LinkGraph> createPlatformGraph(MachOPlatform &MOP, in createPlatformGraph() argument
102 const auto &TT = MOP.getExecutionSession().getTargetTriple(); in createPlatformGraph()
128 MachOPlatform &MOP, StringRef PlatformJDName, in MachOPlatformCompleteBootstrapMaterializationUnit() argument
137 MOP(MOP), PlatformJDName(PlatformJDName),
152 auto G = createPlatformGraph(MOP, "<OrcRTCompleteBootstrap>"); in materialize()
188 MOP.getObjectLinkingLayer().emit(std::move(R), std::move(G)); in materialize()
194 MachOPlatform &MOP; member in __anonc143a7de0111::MachOPlatformCompleteBootstrapMaterializationUnit
1725 jitlink::Block &createHeaderBlock(MachOPlatform &MOP, in createHeaderBlock() argument
1730 getMachOHeaderInfoFromTriple(MOP.getExecutionSession().getTargetTriple()); in createHeaderBlock()
1760 SimpleMachOHeaderMU::SimpleMachOHeaderMU(MachOPlatform &MOP, in SimpleMachOHeaderMU() argument
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| H A D | COFFPlatform.cpp | 144 createHeaderInterface(COFFPlatform &MOP, in createHeaderInterface() argument
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| /src/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVPreLegalizer.cpp | 448 for (const auto &MOP : MI.operands()) in generateAssignInstrs() local
449 if (MOP.isReg()) in generateAssignInstrs()
450 widenScalarLLTNextPow2(MOP.getReg(), MRI); in generateAssignInstrs()
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| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 466 bool matchConstantOp(const MachineOperand &MOP, int64_t C);
470 bool matchConstantFPOp(const MachineOperand &MOP, double C);
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| /src/usr.bin/units/ |
| H A D | definitions.units | 459 MOP macaupataca
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| /src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2876 bool CombinerHelper::matchConstantOp(const MachineOperand &MOP, int64_t C) { in matchConstantOp() argument
2877 if (!MOP.isReg()) in matchConstantOp()
2879 auto *MI = MRI.getVRegDef(MOP.getReg()); in matchConstantOp()
2885 bool CombinerHelper::matchConstantFPOp(const MachineOperand &MOP, double C) { in matchConstantFPOp() argument
2886 if (!MOP.isReg()) in matchConstantFPOp()
2889 if (!mi_match(MOP.getReg(), MRI, m_GFCstOrSplat(MaybeCst))) in matchConstantFPOp()
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| /src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 6324 for (const MachineOperand &MOP : MI.operands()) { in getOutliningTypeImpl() local
6325 if (MOP.isGlobal()) { in getOutliningTypeImpl()
6326 Callee = dyn_cast<Function>(MOP.getGlobal()); in getOutliningTypeImpl()
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| /src/contrib/netbsd-tests/usr.bin/netpgpverify/ |
| H A D | t_netpgpverify.sh | 3097 zKWhyfMzglqZS1JUGAbsZract/LzGqZykbqZLtFfsM2qIhHsLZXbG2dOdgj9+MOP
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| /src/crypto/krb5/src/lib/krb5/unicode/ |
| H A D | UnicodeData.txt | 9138 A0C0;YI SYLLABLE MOP;Lo;0;L;;;;;N;;;;;
10123 A49C;YI RADICAL MOP;So;0;ON;;;;;N;;;;;
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