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Searched refs:Interface (Results 1 – 25 of 320) sorted by relevance

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/src/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/
H A DObjectFileInterface.cpp26 void addInitSymbol(MaterializationUnit::Interface &I, ExecutionSession &ES, in addInitSymbol()
41 static Expected<MaterializationUnit::Interface>
44 MaterializationUnit::Interface I; in getMachOObjectFileSymbolInfo()
98 static Expected<MaterializationUnit::Interface>
101 MaterializationUnit::Interface I; in getELFObjectFileSymbolInfo()
152 static Expected<MaterializationUnit::Interface>
155 MaterializationUnit::Interface I; in getCOFFObjectFileSymbolInfo()
234 Expected<MaterializationUnit::Interface>
237 MaterializationUnit::Interface I; in getGenericObjectFileSymbolInfo()
274 Expected<MaterializationUnit::Interface>
H A DLayer.cpp35 : MaterializationUnit(Interface()), TSM(std::move(TSM)) { in IRMaterializationUnit()
103 ThreadSafeModule TSM, Interface I, in IRMaterializationUnit()
171 MaterializationUnit::Interface I) { in add()
208 ObjectLayer &L, std::unique_ptr<MemoryBuffer> O, Interface I) in BasicObjectLayerMaterializationUnit()
/src/sys/contrib/device-tree/Bindings/media/
H A Dti-am437x-vpfe.txt14 0 - Raw Bayer Interface.
15 1 - 8 Bit BT656 Interface.
16 2 - 10 Bit BT656 Interface.
17 3 - YCbCr 8 Bit Interface.
18 4 - YCbCr 16 Bit Interface.
H A Dimx7-csi.txt1 Freescale i.MX7 CMOS Sensor Interface
7 This is device node for the CMOS Sensor Interface (CSI) which enables the chip
/src/sys/contrib/device-tree/Bindings/powerpc/nintendo/
H A Dwii.txt23 1.a) The Video Interface (VI) node
34 1.b) The Processor Interface (PI) node
67 1.d) The Serial Interface (SI) node
79 1.e) The Audio Interface (AI) node
90 1.f) The External Interface (EXI) node
100 1.h) The Enhanced Host Controller Interface (EHCI) node
102 Represents the USB 2.0 Enhanced Host Controller Interface.
110 1.i) The Secure Digital Host Controller Interface (SDHCI) nodes
153 1.n) The Disk Interface (DI) node
H A Dgamecube.txt14 1.a) The Video Interface (VI) node
25 1.b) The Processor Interface (PI) node
67 1.d) The Disk Interface (DI) node
77 1.e) The Audio Interface (AI) node
88 1.f) The Serial Interface (SI) node
100 1.g) The External Interface (EXI) node
/src/sys/contrib/device-tree/Bindings/mfd/
H A Dzii,rave-sp.txt23 rave-sp-nvmem : Interface to onboard EEPROM
25 rave-sp-hwmon : Interface to onboard hardware sensors
26 rave-sp-leds : Interface to onboard LEDs
27 rave-sp-input : Interface to onboard power button
/src/contrib/llvm-project/llvm/lib/Object/
H A DTapiFile.cpp50 TapiFile::TapiFile(MemoryBufferRef Source, const InterfaceFile &Interface, in TapiFile() argument
53 FileKind(Interface.getFileType()) { in TapiFile()
54 for (const auto *Symbol : Interface.symbols()) { in TapiFile()
64 if (Interface.getPlatforms().count(PLATFORM_MACOS) && Arch == AK_i386) { in TapiFile()
/src/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/Orc/
H A DLayer.h46 IRMaterializationUnit(ThreadSafeModule TSM, Interface I,
146 MaterializationUnit::Interface I);
156 MaterializationUnit::Interface I) { in add()
183 Interface I);
H A DObjectFileInterface.h26 void addInitSymbol(MaterializationUnit::Interface &I, ExecutionSession &ES,
32 Expected<MaterializationUnit::Interface>
/src/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-minipack.dts128 * to PIM (Port Interface Module) #1 (1-based).
141 * to PIM (Port Interface Module) #2 (1-based).
154 * to PIM (Port Interface Module) #3 (1-based).
167 * to PIM (Port Interface Module) #4 (1-based).
180 * to PIM (Port Interface Module) #5 (1-based).
193 * to PIM (Port Interface Module) #6 (1-based).
206 * to PIM (Port Interface Module) #7 (1-based).
219 * to PIM (Port Interface Module) #8 (1-based).
805 * (Port Interface Module) #1 (1-based).
871 * (Port Interface Module) #2 (1-based).
[all …]
/src/contrib/llvm-project/clang/lib/AST/
H A DExternalASTMerger.cpp322 void ExternalASTMerger::CompleteType(ObjCInterfaceDecl *Interface) { in CompleteType() argument
323 assert(Interface->hasExternalLexicalStorage()); in CompleteType()
325 Interface, [&](ASTImporter &Forward, ASTImporter &Reverse, in CompleteType()
334 Forward.MapImported(SourceInterface, Interface); in CompleteType()
341 bool ExternalASTMerger::CanComplete(DeclContext *Interface) { in CanComplete() argument
342 assert(Interface->hasExternalLexicalStorage() || in CanComplete()
343 Interface->hasExternalVisibleStorage()); in CanComplete()
345 ForEachMatchingDC(Interface, in CanComplete()
/src/sys/contrib/device-tree/Bindings/phy/
H A Dti-phy-gmii-sel.txt1 CPSW Port's Interface Mode Selection PHY Tree Bindings
31 CPSW Port's Interface Mode Selection PHY describes MII interface mode between
34 CPSW Port's Interface Mode Selection PHY device should defined as child device
/src/sbin/pfctl/tests/
H A Dpfctl_test_list.inc168 PFCTL_TEST_IFACE(1057, "Interface translation: IPv4 rule, interface without brackets is translated")
169 PFCTL_TEST_IFACE(1058, "Interface translation: IPv4 rule, interface without brackets is translated,…
170 PFCTL_TEST_IFACE(1059, "Interface translation: IPv4 rule, interface with brackets is not translated…
171 PFCTL_TEST_IFACE(1060, "Interface translation: IPv4 rule, interface with brackets is not translated…
172 PFCTL_TEST_IFACE(1061, "Interface translation: IPv6 rule, interface without brackets is translated")
173 PFCTL_TEST_IFACE(1062, "Interface translation: IPv6 rule, interface without brackets is translated,…
174 PFCTL_TEST_IFACE(1063, "Interface translation: IPv6 rule, interface with brackets is not translated…
175 PFCTL_TEST_IFACE(1064, "Interface translation: IPv6 rule, interface with brackets is not translated…
/src/sys/contrib/device-tree/Bindings/extcon/
H A Dextcon-sm5502.txt2 * SM5502 MUIC (Micro-USB Interface Controller) device
4 The Silicon Mitus SM5502 is a MUIC (Micro-USB Interface Controller) device
/src/contrib/wpa/wpa_supplicant/examples/
H A Ddbus-listen-preq.py51 wpas = dbus.Interface(wpas_obj, WPAS_DBUS_INTERFACE)
58 iface = dbus.Interface(if_obj, WPAS_DBUS_INTERFACES_INTERFACE)
H A Dwpas-dbus-new.py42 net = dbus.Interface(net_obj, WPAS_DBUS_BSS_INTERFACE)
106 wpas = dbus.Interface(wpas_obj, WPAS_DBUS_INTERFACE)
140 iface = dbus.Interface(if_obj, WPAS_DBUS_INTERFACES_INTERFACE)
H A Dwpas-dbus-new-wps.py46 wpas = dbus.Interface(wpas_obj, WPAS_DBUS_INTERFACE)
73 wps = dbus.Interface(if_obj, WPAS_DBUS_WPS_INTERFACE)
H A Dwpas-dbus-new-signals.py49 net = dbus.Interface(net_obj, WPAS_DBUS_BSS_INTERFACE)
136 wpas = dbus.Interface(wpas_obj, WPAS_DBUS_INTERFACE)
150 iface = dbus.Interface(if_obj, WPAS_DBUS_INTERFACES_INTERFACE)
/src/contrib/llvm-project/clang/lib/Sema/
H A DSemaModule.cpp277 case ModuleDeclKind::Interface: in ActOnModuleDecl()
302 MDK = ModuleDeclKind::Interface; in ActOnModuleDecl()
391 Module *Interface = nullptr; // The interface for an implementation. in ActOnModuleDecl() local
393 case ModuleDeclKind::Interface: in ActOnModuleDecl()
429 Interface = getModuleLoader().loadModule(ModuleLoc, {ModuleNameLoc}, in ActOnModuleDecl()
434 if (!Interface) { in ActOnModuleDecl()
486 if (Interface) { in ActOnModuleDecl()
488 makeTransitiveImportsVisible(getASTContext(), VisibleModules, Interface, in ActOnModuleDecl()
494 Interface, Path[0].second); in ActOnModuleDecl()
500 Mod->Imports.insert(Interface); // As if we imported it. in ActOnModuleDecl()
[all …]
/src/lib/libbluetooth/
H A Dprotocols15 hid-control 17 HID-Control # Human Interface Device (control)
16 hid-interrupt 19 HID-Interrupt # Human Interface Device (interrupt)
/src/sys/contrib/device-tree/Bindings/sound/
H A Dfsl,esai.txt1 Freescale Enhanced Serial Audio Interface (ESAI) Controller
3 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
5 standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and
/src/sys/contrib/device-tree/Bindings/firmware/xilinx/
H A Dxlnx,zynqmp-firmware.txt2 Device Tree Bindings for the Xilinx Zynq MPSoC Firmware Interface
7 driver provides an interface to firmware APIs. Interface APIs can be
/src/sys/contrib/device-tree/Bindings/net/
H A Dxilinx_gmii2rgmii.txt4 The Gigabit Media Independent Interface (GMII) to Reduced Gigabit Media
5 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
/src/sys/contrib/device-tree/Bindings/slimbus/
H A Dslim-qcom-ctrl.txt18 - clocks : Interface and core clocks used by this SLIMbus controller
20 "iface" : Interface clock for this controller

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